Tim Northover b78e4cafde GlobalISel: translate floating-point round/extend ...

llvm-svn: 279320

2016-08-19 20:48:23 +00:00

..

AArch64

GlobalISel: translate floating-point round/extend

2016-08-19 20:48:23 +00:00

AMDGPU

Revert "RegScavenging: Add scavengeRegisterBackwards()"

2016-08-19 03:03:24 +00:00

ARM

Revert "[SimplifyCFG] Rewrite SinkThenElseCodeToEnd"

2016-08-19 20:22:39 +00:00

BPF

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Generic

Fix build breaks after r277028

2016-07-28 20:25:21 +00:00

Hexagon

[Hexagon] Add RUN line to test

2016-08-19 19:36:35 +00:00

Inputs

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Lanai

Add a REQUIRES: assert on a Lanai test that uses a -debug-only flag

2016-07-29 19:35:22 +00:00

Mips

Revert "RegScavenging: Add scavengeRegisterBackwards()"

2016-08-19 03:03:24 +00:00

MIR

[GlobalISel] Add Selected MachineFunction property.

2016-08-02 16:49:19 +00:00

MSP430

Revert r279242 - it's failing the tests

2016-08-19 14:18:34 +00:00

NVPTX

[NVPTX] Switch nvptx-use-infer-addrspace to true.

2016-08-19 20:46:45 +00:00

PowerPC

Revert "CodeGen: If Convert blocks that would form a diamond when tail-merged."

2016-08-19 18:17:04 +00:00

SPARC

Revert "[Sparc] Leon errata fix passes."

2016-08-12 14:48:09 +00:00

SystemZ

[SystemZ] Use valid base/index regs for inline asm

2016-08-18 21:44:15 +00:00

Thumb

Revert "RegScavenging: Add scavengeRegisterBackwards()"

2016-08-19 03:03:24 +00:00

Thumb2

Revert "CodeGen: If Convert blocks that would form a diamond when tail-merged."

2016-08-19 18:17:04 +00:00

WebAssembly

[WebAssembly] Disable the store-results optimization.

2016-08-18 17:51:27 +00:00

WinEH

Revert EH-specific checks in BranchFolding that were causing blow ups in compile time.

2016-07-27 17:55:33 +00:00

X86

[X86][SSE] Generalised combining to VZEXT_MOVL to any vector size

2016-08-19 17:02:00 +00:00

XCore

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