Venkatraman Govindaraju e9ef51222b [Sparc] Emit .register directive to declare the use of global registers %g2, %g4, %g6 and %g7. ...

llvm-svn: 191158

2013-09-22 00:42:30 +00:00

..

AArch64

Implement 3 AArch64 neon instructions : umov smov ins.

2013-09-17 02:21:02 +00:00

ARM

Initialize BSSSection explicitly in InitMachOMCObjectFileInfo() to appease msvc.

2013-09-21 02:34:45 +00:00

CPP

[tests] Cleanup initialization of test suffixes.

2013-08-16 00:37:11 +00:00

Generic

[tests] Cleanup initialization of test suffixes.

2013-08-16 00:37:11 +00:00

Hexagon

Debug Info Testing: use null instead of an empty string in context field.

2013-09-09 00:12:17 +00:00

Inputs

Debug Info: add an identifier field to DICompositeType.

2013-08-26 22:39:55 +00:00

Mips

Set .reorder for the stub so that gas takes care of delay slot processing.

2013-09-21 01:37:52 +00:00

MSP430

[tests] Cleanup initialization of test suffixes.

2013-08-16 00:37:11 +00:00

NVPTX

[NVPTX] Make constant vector test case endian-independent

2013-09-19 13:14:44 +00:00

PowerPC

[PowerPC] Fix problems with large code model (PR17169).

2013-09-17 20:03:25 +00:00

R600

R600: Move code handling literal folding into R600ISelLowering.

2013-09-12 23:44:53 +00:00

SPARC

[Sparc] Emit .register directive to declare the use of global registers %g2, %g4, %g6 and %g7.

2013-09-22 00:42:30 +00:00

SystemZ

[SystemZ] Add unsigned compare-and-branch instructions

2013-09-18 09:56:40 +00:00

Thumb

ARM: Use "dmb sy" for barriers on M-class CPUs

2013-08-28 14:39:19 +00:00

Thumb2

[ARMv8] Prevent generation of deprecated IT blocks on ARMv8 in Thumb mode.

2013-09-09 14:21:49 +00:00

X86

Revert "SelectionDAG: Teach the legalizer to split SETCC if VSELECT needs splitting too."

2013-09-21 15:09:46 +00:00

XCore

XCore handling of thread local lowering

2013-09-09 10:42:11 +00:00