c93e7dec7e
Check lines for these were regenerated, but without any significant changes (mostly different GEP source element types).
492 lines
15 KiB
LLVM
492 lines
15 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -passes=instcombine -S < %s | FileCheck %s
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; Function Attrs: noinline uwtable
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define i32 @foo(ptr nocapture writeonly %arg) {
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; CHECK-LABEL: @foo(
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; CHECK-NEXT: bb:
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; CHECK-NEXT: [[VAR:%.*]] = call i32 @baz()
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; CHECK-NEXT: store i32 [[VAR]], ptr [[ARG:%.*]], align 4
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; CHECK-NEXT: [[VAR1:%.*]] = call i32 @baz()
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; CHECK-NEXT: ret i32 [[VAR1]]
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;
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bb:
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%var = call i32 @baz()
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store i32 %var, ptr %arg, align 4
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%var1 = call i32 @baz()
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ret i32 %var1
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}
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declare i32 @baz()
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; Function Attrs: uwtable
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; This is an equivalent IR for a c-style example with a large function (foo)
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; with out-params which are unused in the caller(test8). Note that foo is
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; marked noinline to prevent IPO transforms.
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; int foo();
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;
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; extern int foo(int *out) __attribute__((noinline));
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; int foo(int *out) {
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; *out = baz();
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; return baz();
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; }
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;
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; int test() {
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;
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; int notdead;
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; if (foo(¬dead))
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; return 0;
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;
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; int dead;
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; int tmp = foo(&dead);
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; if (notdead)
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; return tmp;
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; return bar();
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; }
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; TODO: We should be able to sink the second call @foo at bb5 down to bb_crit_edge
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define i32 @test() {
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; CHECK-LABEL: @test(
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; CHECK-NEXT: bb:
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; CHECK-NEXT: [[VAR:%.*]] = alloca i32, align 4
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; CHECK-NEXT: [[VAR1:%.*]] = alloca i32, align 4
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; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 4, ptr nonnull [[VAR]])
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; CHECK-NEXT: [[VAR3:%.*]] = call i32 @foo(ptr nonnull writeonly [[VAR]])
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; CHECK-NEXT: [[VAR4:%.*]] = icmp eq i32 [[VAR3]], 0
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; CHECK-NEXT: br i1 [[VAR4]], label [[BB5:%.*]], label [[BB14:%.*]]
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; CHECK: bb5:
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; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 4, ptr nonnull [[VAR1]])
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; CHECK-NEXT: [[VAR8:%.*]] = load i32, ptr [[VAR]], align 4
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; CHECK-NEXT: [[VAR9:%.*]] = icmp eq i32 [[VAR8]], 0
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; CHECK-NEXT: [[VAR7:%.*]] = call i32 @foo(ptr nonnull writeonly [[VAR1]])
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; CHECK-NEXT: br i1 [[VAR9]], label [[BB10:%.*]], label [[BB_CRIT_EDGE:%.*]]
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; CHECK: bb10:
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; CHECK-NEXT: [[VAR11:%.*]] = call i32 @bar()
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; CHECK-NEXT: br label [[BB12:%.*]]
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; CHECK: bb_crit_edge:
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; CHECK-NEXT: br label [[BB12]]
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; CHECK: bb12:
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; CHECK-NEXT: [[VAR13:%.*]] = phi i32 [ [[VAR11]], [[BB10]] ], [ [[VAR7]], [[BB_CRIT_EDGE]] ]
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; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 4, ptr nonnull [[VAR1]])
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; CHECK-NEXT: br label [[BB14]]
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; CHECK: bb14:
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; CHECK-NEXT: [[VAR15:%.*]] = phi i32 [ [[VAR13]], [[BB12]] ], [ 0, [[BB:%.*]] ]
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; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 4, ptr nonnull [[VAR]])
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; CHECK-NEXT: ret i32 [[VAR15]]
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;
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bb:
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%var = alloca i32, align 4
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%var1 = alloca i32, align 4
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call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %var) #4
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%var3 = call i32 @foo(ptr nonnull writeonly %var)
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%var4 = icmp eq i32 %var3, 0
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br i1 %var4, label %bb5, label %bb14
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bb5: ; preds = %bb
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call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %var1) #4
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%var8 = load i32, ptr %var, align 4
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%var9 = icmp eq i32 %var8, 0
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%var7 = call i32 @foo(ptr nonnull writeonly %var1)
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br i1 %var9, label %bb10, label %bb_crit_edge
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bb10: ; preds = %bb5
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%var11 = call i32 @bar()
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br label %bb12
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bb_crit_edge:
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br label %bb12
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bb12: ; preds = %bb10, %bb5
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%var13 = phi i32 [ %var11, %bb10 ], [ %var7, %bb_crit_edge ]
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call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %var1) #4
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br label %bb14
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bb14: ; preds = %bb12, %bb
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%var15 = phi i32 [ %var13, %bb12 ], [ 0, %bb ]
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call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %var)
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ret i32 %var15
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}
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declare i32 @unknown(ptr %dest)
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declare i32 @unknown.as2(ptr addrspace(2) %dest)
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define i32 @sink_write_to_use(i1 %c) {
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; CHECK-LABEL: @sink_write_to_use(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[VAR:%.*]] = alloca i32, align 4
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; CHECK-NEXT: br i1 [[C:%.*]], label [[EARLY_RETURN:%.*]], label [[USE_BLOCK:%.*]]
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; CHECK: early_return:
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; CHECK-NEXT: ret i32 0
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; CHECK: use_block:
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; CHECK-NEXT: [[VAR3:%.*]] = call i32 @unknown(ptr nonnull writeonly [[VAR]]) #[[ATTR1:[0-9]+]]
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; CHECK-NEXT: ret i32 [[VAR3]]
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;
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entry:
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%var = alloca i32, align 4
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%var3 = call i32 @unknown(ptr writeonly %var) argmemonly nounwind willreturn
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br i1 %c, label %early_return, label %use_block
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early_return:
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ret i32 0
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use_block:
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ret i32 %var3
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}
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define i32 @sink_readwrite_to_use(i1 %c) {
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; CHECK-LABEL: @sink_readwrite_to_use(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[VAR:%.*]] = alloca i32, align 4
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; CHECK-NEXT: br i1 [[C:%.*]], label [[EARLY_RETURN:%.*]], label [[USE_BLOCK:%.*]]
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; CHECK: early_return:
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; CHECK-NEXT: ret i32 0
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; CHECK: use_block:
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; CHECK-NEXT: [[VAR3:%.*]] = call i32 @unknown(ptr nonnull [[VAR]]) #[[ATTR1]]
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; CHECK-NEXT: ret i32 [[VAR3]]
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;
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entry:
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%var = alloca i32, align 4
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%var3 = call i32 @unknown(ptr %var) argmemonly nounwind willreturn
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br i1 %c, label %early_return, label %use_block
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early_return:
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ret i32 0
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use_block:
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ret i32 %var3
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}
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define i32 @sink_bitcast(i1 %c) {
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; CHECK-LABEL: @sink_bitcast(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[VAR:%.*]] = alloca i8, align 8
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; CHECK-NEXT: br i1 [[C:%.*]], label [[EARLY_RETURN:%.*]], label [[USE_BLOCK:%.*]]
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; CHECK: early_return:
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; CHECK-NEXT: ret i32 0
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; CHECK: use_block:
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; CHECK-NEXT: [[VAR3:%.*]] = call i32 @unknown(ptr nonnull [[VAR]]) #[[ATTR1]]
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; CHECK-NEXT: ret i32 [[VAR3]]
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;
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entry:
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%var = alloca i8, align 8
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%var3 = call i32 @unknown(ptr %var) argmemonly nounwind willreturn
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br i1 %c, label %early_return, label %use_block
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early_return:
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ret i32 0
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use_block:
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ret i32 %var3
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}
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define i32 @sink_gep1(i1 %c) {
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; CHECK-LABEL: @sink_gep1(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[VAR:%.*]] = alloca i64, align 8
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; CHECK-NEXT: br i1 [[C:%.*]], label [[EARLY_RETURN:%.*]], label [[USE_BLOCK:%.*]]
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; CHECK: early_return:
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; CHECK-NEXT: ret i32 0
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; CHECK: use_block:
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; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i32, ptr [[VAR]], i64 1
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; CHECK-NEXT: [[VAR3:%.*]] = call i32 @unknown(ptr nonnull [[GEP]]) #[[ATTR1]]
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; CHECK-NEXT: ret i32 [[VAR3]]
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;
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entry:
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%var = alloca i64, align 8
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%gep = getelementptr i32, ptr %var, i32 1
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%var3 = call i32 @unknown(ptr %gep) argmemonly nounwind willreturn
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br i1 %c, label %early_return, label %use_block
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early_return:
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ret i32 0
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use_block:
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ret i32 %var3
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}
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define i32 @sink_gep2(i1 %c) {
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; CHECK-LABEL: @sink_gep2(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[VAR:%.*]] = alloca i64, align 8
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; CHECK-NEXT: br i1 [[C:%.*]], label [[EARLY_RETURN:%.*]], label [[USE_BLOCK:%.*]]
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; CHECK: early_return:
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; CHECK-NEXT: ret i32 0
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; CHECK: use_block:
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; CHECK-NEXT: [[VAR3:%.*]] = call i32 @unknown(ptr nonnull [[VAR]]) #[[ATTR1]]
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; CHECK-NEXT: ret i32 [[VAR3]]
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;
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entry:
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%var = alloca i64, align 8
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%var3 = call i32 @unknown(ptr %var) argmemonly nounwind willreturn
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br i1 %c, label %early_return, label %use_block
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early_return:
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ret i32 0
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use_block:
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ret i32 %var3
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}
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define i32 @sink_addrspacecast(i1 %c) {
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; CHECK-LABEL: @sink_addrspacecast(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[VAR:%.*]] = alloca i32, align 8
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; CHECK-NEXT: br i1 [[C:%.*]], label [[EARLY_RETURN:%.*]], label [[USE_BLOCK:%.*]]
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; CHECK: early_return:
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; CHECK-NEXT: ret i32 0
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; CHECK: use_block:
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; CHECK-NEXT: [[CAST:%.*]] = addrspacecast ptr [[VAR]] to ptr addrspace(2)
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; CHECK-NEXT: [[VAR3:%.*]] = call i32 @unknown.as2(ptr addrspace(2) [[CAST]]) #[[ATTR1]]
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; CHECK-NEXT: ret i32 [[VAR3]]
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;
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entry:
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%var = alloca i32, align 8
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%cast = addrspacecast ptr %var to ptr addrspace(2)
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%var3 = call i32 @unknown.as2(ptr addrspace(2) %cast) argmemonly nounwind willreturn
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br i1 %c, label %early_return, label %use_block
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early_return:
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ret i32 0
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use_block:
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ret i32 %var3
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}
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define i32 @neg_infinite_loop(i1 %c) {
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; CHECK-LABEL: @neg_infinite_loop(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[VAR:%.*]] = alloca i32, align 4
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; CHECK-NEXT: [[VAR3:%.*]] = call i32 @unknown(ptr nonnull [[VAR]]) #[[ATTR2:[0-9]+]]
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; CHECK-NEXT: br i1 [[C:%.*]], label [[EARLY_RETURN:%.*]], label [[USE_BLOCK:%.*]]
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; CHECK: early_return:
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; CHECK-NEXT: ret i32 0
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; CHECK: use_block:
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; CHECK-NEXT: ret i32 [[VAR3]]
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;
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entry:
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%var = alloca i32, align 4
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%var3 = call i32 @unknown(ptr %var) argmemonly nounwind
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br i1 %c, label %early_return, label %use_block
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early_return:
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ret i32 0
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use_block:
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ret i32 %var3
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}
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define i32 @neg_throw(i1 %c) {
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; CHECK-LABEL: @neg_throw(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[VAR:%.*]] = alloca i32, align 4
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; CHECK-NEXT: [[VAR3:%.*]] = call i32 @unknown(ptr nonnull [[VAR]]) #[[ATTR3:[0-9]+]]
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; CHECK-NEXT: br i1 [[C:%.*]], label [[EARLY_RETURN:%.*]], label [[USE_BLOCK:%.*]]
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; CHECK: early_return:
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; CHECK-NEXT: ret i32 0
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; CHECK: use_block:
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; CHECK-NEXT: ret i32 [[VAR3]]
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;
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entry:
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%var = alloca i32, align 4
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%var3 = call i32 @unknown(ptr %var) argmemonly willreturn
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br i1 %c, label %early_return, label %use_block
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early_return:
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ret i32 0
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use_block:
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ret i32 %var3
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}
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define i32 @neg_unknown_write(i1 %c) {
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; CHECK-LABEL: @neg_unknown_write(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[VAR:%.*]] = alloca i32, align 4
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; CHECK-NEXT: [[VAR3:%.*]] = call i32 @unknown(ptr nonnull [[VAR]]) #[[ATTR4:[0-9]+]]
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; CHECK-NEXT: br i1 [[C:%.*]], label [[EARLY_RETURN:%.*]], label [[USE_BLOCK:%.*]]
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; CHECK: early_return:
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; CHECK-NEXT: ret i32 0
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; CHECK: use_block:
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; CHECK-NEXT: ret i32 [[VAR3]]
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;
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entry:
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%var = alloca i32, align 4
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%var3 = call i32 @unknown(ptr %var) nounwind willreturn
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br i1 %c, label %early_return, label %use_block
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early_return:
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ret i32 0
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use_block:
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ret i32 %var3
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}
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define i32 @sink_lifetime1(i1 %c) {
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; CHECK-LABEL: @sink_lifetime1(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[VAR:%.*]] = alloca i32, align 4
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; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 4, ptr nonnull [[VAR]])
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; CHECK-NEXT: [[VAR3:%.*]] = call i32 @unknown(ptr nonnull [[VAR]]) #[[ATTR1]]
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; CHECK-NEXT: br i1 [[C:%.*]], label [[EARLY_RETURN:%.*]], label [[USE_BLOCK:%.*]]
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; CHECK: early_return:
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; CHECK-NEXT: ret i32 0
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; CHECK: use_block:
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; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 4, ptr nonnull [[VAR]])
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; CHECK-NEXT: ret i32 [[VAR3]]
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;
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entry:
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%var = alloca i32, align 4
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call void @llvm.lifetime.start.p0(i64 4, ptr %var)
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%var3 = call i32 @unknown(ptr %var) argmemonly nounwind willreturn
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br i1 %c, label %early_return, label %use_block
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early_return:
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ret i32 0
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use_block:
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call void @llvm.lifetime.end.p0(i64 4, ptr %var)
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ret i32 %var3
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}
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define i32 @sink_lifetime2(i1 %c) {
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; CHECK-LABEL: @sink_lifetime2(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[VAR:%.*]] = alloca i32, align 4
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; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 4, ptr nonnull [[VAR]])
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; CHECK-NEXT: [[VAR3:%.*]] = call i32 @unknown(ptr nonnull [[VAR]]) #[[ATTR1]]
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; CHECK-NEXT: br i1 [[C:%.*]], label [[MERGE:%.*]], label [[USE_BLOCK:%.*]]
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; CHECK: merge:
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; CHECK-NEXT: [[RET:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[VAR3]], [[USE_BLOCK]] ]
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; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 4, ptr nonnull [[VAR]])
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; CHECK-NEXT: ret i32 [[RET]]
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; CHECK: use_block:
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; CHECK-NEXT: br label [[MERGE]]
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;
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entry:
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%var = alloca i32, align 4
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call void @llvm.lifetime.start.p0(i64 4, ptr %var)
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%var3 = call i32 @unknown(ptr %var) argmemonly nounwind willreturn
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br i1 %c, label %merge, label %use_block
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merge:
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%ret = phi i32 [0, %entry], [%var3, %use_block]
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call void @llvm.lifetime.end.p0(i64 4, ptr %var)
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ret i32 %ret
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use_block:
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br label %merge
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}
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define i32 @sink_lifetime3(i1 %c) {
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; CHECK-LABEL: @sink_lifetime3(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[VAR:%.*]] = alloca i32, align 4
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; CHECK-NEXT: br i1 [[C:%.*]], label [[EARLY_RETURN:%.*]], label [[USE_BLOCK:%.*]]
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; CHECK: early_return:
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; CHECK-NEXT: ret i32 0
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; CHECK: use_block:
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; CHECK-NEXT: [[VAR3:%.*]] = call i32 @unknown(ptr nonnull [[VAR]]) #[[ATTR1]]
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; CHECK-NEXT: ret i32 [[VAR3]]
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;
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entry:
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%var = alloca i32, align 4
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call void @llvm.lifetime.start.p0(i64 4, ptr %var)
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call void @llvm.lifetime.end.p0(i64 4, ptr %var)
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; If unknown accesses %var, that's UB
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%var3 = call i32 @unknown(ptr %var) argmemonly nounwind willreturn
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br i1 %c, label %early_return, label %use_block
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early_return:
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ret i32 0
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use_block:
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ret i32 %var3
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}
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define i32 @sink_lifetime4a(i1 %c) {
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; CHECK-LABEL: @sink_lifetime4a(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[VAR:%.*]] = alloca i32, align 4
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; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 4, ptr nonnull [[VAR]])
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; CHECK-NEXT: [[VAR3:%.*]] = call i32 @unknown(ptr nonnull [[VAR]]) #[[ATTR1]]
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; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 4, ptr nonnull [[VAR]])
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; CHECK-NEXT: br i1 [[C:%.*]], label [[EARLY_RETURN:%.*]], label [[USE_BLOCK:%.*]]
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; CHECK: early_return:
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; CHECK-NEXT: ret i32 0
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; CHECK: use_block:
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; CHECK-NEXT: ret i32 [[VAR3]]
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;
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entry:
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%var = alloca i32, align 4
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call void @llvm.lifetime.start.p0(i64 4, ptr %var)
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%var3 = call i32 @unknown(ptr %var) argmemonly nounwind willreturn
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call void @llvm.lifetime.end.p0(i64 4, ptr %var)
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br i1 %c, label %early_return, label %use_block
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early_return:
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ret i32 0
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use_block:
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ret i32 %var3
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}
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; Version which only writes to var, and thus can't rely on may-read scan for
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; clobbers to prevent the transform
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define i32 @sink_lifetime4b(i1 %c) {
|
|
; CHECK-LABEL: @sink_lifetime4b(
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|
; CHECK-NEXT: entry:
|
|
; CHECK-NEXT: [[VAR:%.*]] = alloca i32, align 4
|
|
; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 4, ptr nonnull [[VAR]])
|
|
; CHECK-NEXT: [[VAR3:%.*]] = call i32 @unknown(ptr nonnull writeonly [[VAR]]) #[[ATTR1]]
|
|
; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 4, ptr nonnull [[VAR]])
|
|
; CHECK-NEXT: br i1 [[C:%.*]], label [[EARLY_RETURN:%.*]], label [[USE_BLOCK:%.*]]
|
|
; CHECK: early_return:
|
|
; CHECK-NEXT: ret i32 0
|
|
; CHECK: use_block:
|
|
; CHECK-NEXT: ret i32 [[VAR3]]
|
|
;
|
|
entry:
|
|
%var = alloca i32, align 4
|
|
call void @llvm.lifetime.start.p0(i64 4, ptr %var)
|
|
%var3 = call i32 @unknown(ptr writeonly %var) argmemonly nounwind willreturn
|
|
call void @llvm.lifetime.end.p0(i64 4, ptr %var)
|
|
br i1 %c, label %early_return, label %use_block
|
|
|
|
early_return:
|
|
ret i32 0
|
|
|
|
use_block:
|
|
ret i32 %var3
|
|
}
|
|
; Mostly checking that trying to sink a non-call doesn't crash (i.e. prior bug)
|
|
define i32 @sink_atomicrmw_to_use(i1 %c) {
|
|
; CHECK-LABEL: @sink_atomicrmw_to_use(
|
|
; CHECK-NEXT: entry:
|
|
; CHECK-NEXT: [[VAR:%.*]] = alloca i32, align 4
|
|
; CHECK-NEXT: store i32 0, ptr [[VAR]], align 4
|
|
; CHECK-NEXT: [[VAR3:%.*]] = atomicrmw add ptr [[VAR]], i32 1 seq_cst, align 4
|
|
; CHECK-NEXT: br i1 [[C:%.*]], label [[EARLY_RETURN:%.*]], label [[USE_BLOCK:%.*]]
|
|
; CHECK: early_return:
|
|
; CHECK-NEXT: ret i32 0
|
|
; CHECK: use_block:
|
|
; CHECK-NEXT: ret i32 [[VAR3]]
|
|
;
|
|
entry:
|
|
%var = alloca i32, align 4
|
|
store i32 0, ptr %var
|
|
%var3 = atomicrmw add ptr %var, i32 1 seq_cst, align 4
|
|
br i1 %c, label %early_return, label %use_block
|
|
|
|
early_return:
|
|
ret i32 0
|
|
|
|
use_block:
|
|
ret i32 %var3
|
|
}
|
|
|
|
|
|
declare i32 @bar()
|
|
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture)
|
|
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture)
|
|
|