3717aa5ddb
The recent expression type changes still need more discussion, which will happen on phabricator or on the mailing list. The precise list of commits reverted are: - "Refactor division generation code" - "[NFC] Generate runtime checks after the SCoP" - "[FIX] Determine insertion point during SCEV expansion" - "Look through IntToPtr & PtrToInt instructions" - "Use minimal types for generated expressions" - "Temporarily promote values to i64 again" - "[NFC] Avoid unnecessary comparison for min/max expressions" - "[Polly] Fix -Wunused-variable warnings (NFC)" - "[NFC] Simplify min/max expression generation" - "Simplify the type adjustment in the IslExprBuilder" Some of them are just reverted as we would otherwise get conflicts. I will try to re-commit them if possible. llvm-svn: 272483
70 lines
3.5 KiB
LLVM
70 lines
3.5 KiB
LLVM
;RUN: opt %loadPolly -polly-import-jscop -polly-import-jscop-dir=%S -polly-import-jscop-postfix=transformed+withconst -polly-codegen < %s -S | FileCheck -check-prefix=WITHCONST %s
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;RUN: opt %loadPolly -polly-import-jscop -polly-import-jscop-dir=%S -polly-import-jscop-postfix=transformed+withoutconst -polly-codegen < %s -S | FileCheck -check-prefix=WITHOUTCONST %s
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;
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;float A[1040];
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;
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;int codegen_simple_md() {
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; for (int i = 0; i < 32; ++i)
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; for (int j = 0; j < 32; ++j)
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; A[32*i+j] = 100;
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;}
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32-S128"
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@A = common global [1040 x float] zeroinitializer, align 4
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define void @codegen_simple_md() nounwind {
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entry:
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br label %for.cond
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for.cond: ; preds = %for.inc4, %entry
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%i.0 = phi i32 [ 0, %entry ], [ %inc5, %for.inc4 ]
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%exitcond1 = icmp ne i32 %i.0, 32
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br i1 %exitcond1, label %for.body, label %for.end6
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for.body: ; preds = %for.cond
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br label %for.cond1
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for.cond1: ; preds = %for.inc, %for.body
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%j.0 = phi i32 [ 0, %for.body ], [ %inc, %for.inc ]
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%exitcond = icmp ne i32 %j.0, 32
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br i1 %exitcond, label %for.body3, label %for.end
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for.body3: ; preds = %for.cond1
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%mul = shl nsw i32 %i.0, 5
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%add = add nsw i32 %mul, %j.0
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%arrayidx = getelementptr inbounds [1040 x float], [1040 x float]* @A, i32 0, i32 %add
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store float 100.0, float* %arrayidx, align 4
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br label %for.inc
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for.inc: ; preds = %for.body3
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%inc = add nsw i32 %j.0, 1
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br label %for.cond1
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for.end: ; preds = %for.cond1
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br label %for.inc4
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for.inc4: ; preds = %for.end
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%inc5 = add nsw i32 %i.0, 1
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br label %for.cond
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for.end6: ; preds = %for.cond
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ret void
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}
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; WITHCONST: %[[IVOut:polly.indvar[0-9]*]] = phi i64 [ 0, %polly.loop_preheader{{[0-9]*}} ], [ %polly.indvar_next{{[0-9]*}}, %polly.{{[._a-zA-Z0-9]*}} ]
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; WITHCONST: %[[IVIn:polly.indvar[0-9]*]] = phi i64 [ 0, %polly.loop_preheader{{[0-9]*}} ], [ %polly.indvar_next{{[0-9]*}}, %polly.{{[._a-zA-Z0-9]*}} ]
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; WITHCONST: %[[MUL1:[._a-zA-Z0-9]+]] = mul nsw i64 16, %[[IVOut]]
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; WITHCONST: %[[MUL2:[._a-zA-Z0-9]+]] = mul nsw i64 2, %[[IVIn]]
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; WITHCONST: %[[SUM1:[._a-zA-Z0-9]+]] = add nsw i64 %[[MUL1]], %[[MUL2]]
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; WITHCONST: %[[SUM2:[._a-zA-Z0-9]+]] = add nsw i64 %[[SUM1]], 5
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; WITHCONST: %[[ACC:[._a-zA-Z0-9]*]] = getelementptr float, float* getelementptr inbounds ([1040 x float], [1040 x float]* @A, i{{(32|64)}} 0, i{{(32|64)}} 0), i64 %[[SUM2]]
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; WITHCONST: store float 1.000000e+02, float* %[[ACC]]
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; WITHOUTCONST: %[[IVOut:polly.indvar[0-9]*]] = phi i64 [ 0, %polly.loop_preheader{{[0-9]*}} ], [ %polly.indvar_next{{[0-9]*}}, %polly.{{[._a-zA-Z0-9]*}} ]
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; WITHOUTCONST: %[[IVIn:polly.indvar[0-9]*]] = phi i64 [ 0, %polly.loop_preheader{{[0-9]*}} ], [ %polly.indvar_next{{[0-9]*}}, %polly.{{[._a-zA-Z0-9]*}} ]
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; WITHOUTCONST: %[[MUL1:[._a-zA-Z0-9]+]] = mul nsw i64 16, %[[IVOut]]
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; WITHOUTCONST: %[[MUL2:[._a-zA-Z0-9]+]] = mul nsw i64 2, %[[IVIn]]
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; WITHOUTCONST: %[[SUM1:[._a-zA-Z0-9]+]] = add nsw i64 %[[MUL1]], %[[MUL2]]
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; WITHOUTCONST: %[[ACC:[._a-zA-Z0-9]*]] = getelementptr float, float* getelementptr inbounds ([1040 x float], [1040 x float]* @A, i{{(32|64)}} 0, i{{(32|64)}} 0), i64 %[[SUM1]]
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; WITHOUTCONST: store float 1.000000e+02, float* %[[ACC]]
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