f4ee371e60
These flags are now always passed to all tests and need to be disabled if not needed. Disabling these flags, rather than passing them to almost all tests, significantly simplfies our RUN: lines. llvm-svn: 249422
218 lines
7.5 KiB
LLVM
218 lines
7.5 KiB
LLVM
; RUN: opt %loadPolly -basicaa -polly-ast -analyze < %s | FileCheck %s
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; RUN: opt %loadPolly -basicaa -polly-codegen -loops -analyze < %s | FileCheck %s -check-prefix=LOOPS
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;#include <string.h>
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;#define N 1024
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;int A[N];
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;int B[N];
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;
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;void loop_with_condition() {
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; int i;
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;
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; __sync_synchronize();
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; for (i = 0; i < N; i++) {
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; if (i <= N / 2) {
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; if (i > 20)
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; A[i] = 1;
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; else
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; A[i] = 2;
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; }
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; B[i] = 3;
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; }
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; __sync_synchronize();
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;}
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;
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;int main () {
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; int i;
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;
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; memset(A, 0, sizeof(int) * N);
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; memset(B, 0, sizeof(int) * N);
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;
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; loop_with_condition();
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;
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; for (i = 0; i < N; i++)
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; if (B[i] != 3)
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; return 1;
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;
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; for (i = 0; i < N; i++)
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; if (i <= N / 2 && i > 20 && A[i] != 1)
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; return 1;
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; else if (i > N / 2) {
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; if (i <= 20 && A[i] != 2)
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; return 1;
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; if (i > 20 && A[i] != 0)
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; return 1;
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; }
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; return 0;
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;}
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
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@A = common global [1024 x i32] zeroinitializer, align 16 ; <[1024 x i32]*> [#uses=4]
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@B = common global [1024 x i32] zeroinitializer, align 16 ; <[1024 x i32]*> [#uses=4]
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define void @loop_with_condition() nounwind {
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; <label>:0
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fence seq_cst
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br label %1
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; <label>:1 ; preds = %10, %0
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%indvar = phi i64 [ %indvar.next, %10 ], [ 0, %0 ] ; <i64> [#uses=5]
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%scevgep = getelementptr [1024 x i32], [1024 x i32]* @A, i64 0, i64 %indvar ; <i32*> [#uses=2]
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%scevgep1 = getelementptr [1024 x i32], [1024 x i32]* @B, i64 0, i64 %indvar ; <i32*> [#uses=1]
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%i.0 = trunc i64 %indvar to i32 ; <i32> [#uses=2]
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%exitcond = icmp ne i64 %indvar, 1024 ; <i1> [#uses=1]
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br i1 %exitcond, label %2, label %11
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; <label>:2 ; preds = %1
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%3 = icmp sle i32 %i.0, 512 ; <i1> [#uses=1]
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br i1 %3, label %4, label %9
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; <label>:4 ; preds = %2
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%5 = icmp sgt i32 %i.0, 20 ; <i1> [#uses=1]
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br i1 %5, label %6, label %7
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; <label>:6 ; preds = %4
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store i32 1, i32* %scevgep
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br label %8
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; <label>:7 ; preds = %4
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store i32 2, i32* %scevgep
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br label %8
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; <label>:8 ; preds = %7, %6
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br label %9
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; <label>:9 ; preds = %8, %2
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store i32 3, i32* %scevgep1
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br label %10
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; <label>:10 ; preds = %9
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%indvar.next = add i64 %indvar, 1 ; <i64> [#uses=1]
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br label %1
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; <label>:11 ; preds = %1
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fence seq_cst
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ret void
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}
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define i32 @main() nounwind {
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; <label>:0
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call void @llvm.memset.p0i8.i64(i8* bitcast ([1024 x i32]* @A to i8*), i8 0, i64 4096, i32 1, i1 false)
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call void @llvm.memset.p0i8.i64(i8* bitcast ([1024 x i32]* @B to i8*), i8 0, i64 4096, i32 1, i1 false)
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call void @loop_with_condition()
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br label %1
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; <label>:1 ; preds = %8, %0
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%indvar1 = phi i64 [ %indvar.next2, %8 ], [ 0, %0 ] ; <i64> [#uses=3]
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%scevgep3 = getelementptr [1024 x i32], [1024 x i32]* @B, i64 0, i64 %indvar1 ; <i32*> [#uses=1]
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%i.0 = trunc i64 %indvar1 to i32 ; <i32> [#uses=1]
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%2 = icmp slt i32 %i.0, 1024 ; <i1> [#uses=1]
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br i1 %2, label %3, label %9
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; <label>:3 ; preds = %1
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%4 = load i32, i32* %scevgep3 ; <i32> [#uses=1]
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%5 = icmp ne i32 %4, 3 ; <i1> [#uses=1]
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br i1 %5, label %6, label %7
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; <label>:6 ; preds = %3
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br label %39
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; <label>:7 ; preds = %3
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br label %8
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; <label>:8 ; preds = %7
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%indvar.next2 = add i64 %indvar1, 1 ; <i64> [#uses=1]
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br label %1
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; <label>:9 ; preds = %1
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br label %10
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; <label>:10 ; preds = %37, %9
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%indvar = phi i64 [ %indvar.next, %37 ], [ 0, %9 ] ; <i64> [#uses=3]
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%scevgep = getelementptr [1024 x i32], [1024 x i32]* @A, i64 0, i64 %indvar ; <i32*> [#uses=3]
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%i.1 = trunc i64 %indvar to i32 ; <i32> [#uses=6]
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%11 = icmp slt i32 %i.1, 1024 ; <i1> [#uses=1]
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br i1 %11, label %12, label %38
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; <label>:12 ; preds = %10
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%13 = icmp sle i32 %i.1, 512 ; <i1> [#uses=1]
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br i1 %13, label %14, label %20
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; <label>:14 ; preds = %12
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%15 = icmp sgt i32 %i.1, 20 ; <i1> [#uses=1]
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br i1 %15, label %16, label %20
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; <label>:16 ; preds = %14
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%17 = load i32, i32* %scevgep ; <i32> [#uses=1]
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%18 = icmp ne i32 %17, 1 ; <i1> [#uses=1]
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br i1 %18, label %19, label %20
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; <label>:19 ; preds = %16
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br label %39
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; <label>:20 ; preds = %16, %14, %12
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%21 = icmp sgt i32 %i.1, 512 ; <i1> [#uses=1]
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br i1 %21, label %22, label %35
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; <label>:22 ; preds = %20
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%23 = icmp sle i32 %i.1, 20 ; <i1> [#uses=1]
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br i1 %23, label %24, label %28
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; <label>:24 ; preds = %22
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%25 = load i32, i32* %scevgep ; <i32> [#uses=1]
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%26 = icmp ne i32 %25, 2 ; <i1> [#uses=1]
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br i1 %26, label %27, label %28
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; <label>:27 ; preds = %24
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br label %39
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; <label>:28 ; preds = %24, %22
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%29 = icmp sgt i32 %i.1, 20 ; <i1> [#uses=1]
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br i1 %29, label %30, label %34
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; <label>:30 ; preds = %28
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%31 = load i32, i32* %scevgep ; <i32> [#uses=1]
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%32 = icmp ne i32 %31, 0 ; <i1> [#uses=1]
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br i1 %32, label %33, label %34
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; <label>:33 ; preds = %30
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br label %39
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; <label>:34 ; preds = %30, %28
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br label %35
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; <label>:35 ; preds = %34, %20
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br label %36
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; <label>:36 ; preds = %35
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br label %37
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; <label>:37 ; preds = %36
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%indvar.next = add i64 %indvar, 1 ; <i64> [#uses=1]
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br label %10
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; <label>:38 ; preds = %10
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br label %39
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; <label>:39 ; preds = %38, %33, %27, %19, %6
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%.0 = phi i32 [ 1, %6 ], [ 1, %19 ], [ 1, %27 ], [ 1, %33 ], [ 0, %38 ] ; <i32> [#uses=1]
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ret i32 %.0
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}
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declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind
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; CHECK: for (int c0 = 0; c0 <= 1023; c0 += 1) {
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; CHECK: if (c0 <= 20) {
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; CHECK: Stmt_7(c0);
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; CHECK: } else if (c0 <= 512)
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; CHECK: Stmt_6(c0);
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; CHECK: Stmt_9(c0);
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; CHECK: }
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; LOOPS: Printing analysis 'Natural Loop Information' for function 'loop_with_condition':
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; LOOPS: Loop at depth 1 containing: %1<header><exiting>,%2,%4,%7,%6,%8,%9,%10<latch>
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; LOOPS: Loop at depth 1 containing:
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; LOOPS: %polly.loop_header<header>,%polly.cond,%polly.merge,%polly.then,%polly.else,%polly.stmt.,%polly.cond3,%polly.merge4,%polly.then5,%polly.else6,%polly.stmt.7,%polly.stmt{{.*}}<latch><exiting>
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