f52b89561f
https://developer.arm.com/documentation/ddi0601/2024-06/AArch64-Registers/FPMR--Floating-point-Mode-Register for details of the register.
47 lines
1.4 KiB
C
47 lines
1.4 KiB
C
#include <asm/hwcap.h>
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#include <stdint.h>
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#include <sys/auxv.h>
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#ifndef HWCAP2_FPMR
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#define HWCAP2_FPMR (1UL << 48)
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#endif
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uint64_t get_fpmr(void) {
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uint64_t fpmr = 0;
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__asm__ volatile("mrs %0, s3_3_c4_c4_2" : "=r"(fpmr));
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return fpmr;
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}
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void set_fpmr(uint64_t value) {
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__asm__ volatile("msr s3_3_c4_c4_2, %0" ::"r"(value));
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}
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// Set F8S1 (bits 0-2) and LSCALE2 (bits 37-32) (to prove we treat fpmr as 64
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// bit).
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const uint64_t original_fpmr = (uint64_t)0b101010 << 32 | (uint64_t)0b101;
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void expr_func() { set_fpmr(original_fpmr); }
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int main(int argc, char *argv[]) {
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if (!(getauxval(AT_HWCAP2) & HWCAP2_FPMR))
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return 1;
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// As FPMR controls a bunch of floating point options that are quite
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// extensive, we're not going to run any floating point ops here. Instead just
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// update the value from the debugger and check it from this program, and vice
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// versa.
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set_fpmr(original_fpmr);
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// Here the debugger checks it read back the value above, then writes in a new
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// value. Note that the bits are flipped in the new value.
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uint64_t new_fpmr = get_fpmr(); // Set break point at this line.
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uint64_t expected_fpmr = ((uint64_t)0b010101 << 32) | (uint64_t)0b010;
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// If the debugger failed to update the value, exit uncleanly.
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// This also allows you to run this program standalone to create a core file.
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if (new_fpmr != expected_fpmr)
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__builtin_trap();
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return 0;
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}
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