64e464349b
This commit introduces attribute bpf_fastcall to declare BPF functions
that do not clobber some of the caller saved registers (R0-R5).
The idea is to generate the code complying with generic BPF ABI,
but allow compatible Linux Kernel to remove unnecessary spills and
fills of non-scratched registers (given some compiler assistance).
For such functions do register allocation as-if caller saved registers
are not clobbered, but later wrap the calls with spill and fill
patterns that are simple to recognize in kernel.
For example for the following C code:
#define __bpf_fastcall __attribute__((bpf_fastcall))
void bar(void) __bpf_fastcall;
void buz(long i, long j, long k);
void foo(long i, long j, long k) {
bar();
buz(i, j, k);
}
First allocate registers as if:
foo:
call bar # note: no spills for i,j,k (r1,r2,r3)
call buz
exit
And later insert spills fills on the peephole phase:
foo:
*(u64 *)(r10 - 8) = r1; # Such call pattern is
*(u64 *)(r10 - 16) = r2; # correct when used with
*(u64 *)(r10 - 24) = r3; # old kernels.
call bar
r3 = *(u64 *)(r10 - 24); # But also allows new
r2 = *(u64 *)(r10 - 16); # kernels to recognize the
r1 = *(u64 *)(r10 - 8); # pattern and remove spills/fills.
call buz
exit
The offsets for generated spills/fills are picked as minimal stack
offsets for the function. Allocated stack slots are not used for any
other purposes, in order to simplify in-kernel analysis.
50 lines
1.9 KiB
TableGen
50 lines
1.9 KiB
TableGen
//===-- BPFCallingConv.td - Calling Conventions BPF --------*- tablegen -*-===//
|
|
//
|
|
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
|
|
// See https://llvm.org/LICENSE.txt for license information.
|
|
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
//
|
|
// This describes the calling conventions for the BPF architecture.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
// BPF 64-bit C return-value convention.
|
|
def RetCC_BPF64 : CallingConv<[CCIfType<[i64], CCAssignToReg<[R0]>>]>;
|
|
|
|
// BPF 64-bit C Calling convention.
|
|
def CC_BPF64 : CallingConv<[
|
|
// Promote i8/i16/i32 args to i64
|
|
CCIfType<[ i8, i16, i32 ], CCPromoteToType<i64>>,
|
|
|
|
// All arguments get passed in integer registers if there is space.
|
|
CCIfType<[i64], CCAssignToReg<[ R1, R2, R3, R4, R5 ]>>,
|
|
|
|
// Could be assigned to the stack in 8-byte aligned units, but unsupported
|
|
CCAssignToStack<8, 8>
|
|
]>;
|
|
|
|
// Return-value convention when -mattr=+alu32 enabled
|
|
def RetCC_BPF32 : CallingConv<[
|
|
CCIfType<[i32], CCAssignToRegWithShadow<[W0], [R0]>>,
|
|
CCIfType<[i64], CCAssignToRegWithShadow<[R0], [W0]>>
|
|
]>;
|
|
|
|
// Calling convention when -mattr=+alu32 enabled
|
|
def CC_BPF32 : CallingConv<[
|
|
// Promote i8/i16/i32 args to i64
|
|
CCIfType<[i32], CCAssignToRegWithShadow<[W1, W2, W3, W4, W5],
|
|
[R1, R2, R3, R4, R5]>>,
|
|
|
|
// All arguments get passed in integer registers if there is space.
|
|
CCIfType<[i64], CCAssignToRegWithShadow<[R1, R2, R3, R4, R5],
|
|
[W1, W2, W3, W4, W5]>>,
|
|
|
|
// Could be assigned to the stack in 8-byte aligned units, but unsupported
|
|
CCAssignToStack<8, 8>
|
|
]>;
|
|
|
|
def CSR : CalleeSavedRegs<(add R6, R7, R8, R9, R10)>;
|
|
def CSR_PreserveAll : CalleeSavedRegs<(add R0, R1, R2, R3, R4, R5, R6, R7, R8, R9, R10)>;
|