9e9907f1cf
Similar to 806761a762.
For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.
Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.
This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:
```
LLVM :: CodeGen/AMDGPU/fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fabs.ll
LLVM :: CodeGen/AMDGPU/floor.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```
27 lines
877 B
LLVM
27 lines
877 B
LLVM
; RUN: llc -mtriple=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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; RUN: llc -mtriple=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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; FUNC-LABEL: {{^}}v_and_i64_br:
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; SI: s_and_b64
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define amdgpu_kernel void @v_and_i64_br(ptr addrspace(1) %out, ptr addrspace(1) %aptr, ptr addrspace(1) %bptr) {
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entry:
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%tid = call i32 @llvm.amdgcn.mbcnt.lo(i32 -1, i32 0) #0
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%tmp0 = icmp eq i32 %tid, 0
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br i1 %tmp0, label %if, label %endif
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if:
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%a = load i64, ptr addrspace(1) %aptr, align 8
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%b = load i64, ptr addrspace(1) %bptr, align 8
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%and = and i64 %a, %b
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br label %endif
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endif:
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%tmp1 = phi i64 [%and, %if], [0, %entry]
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store i64 %tmp1, ptr addrspace(1) %out, align 8
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ret void
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}
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declare i32 @llvm.amdgcn.mbcnt.lo(i32, i32) #0
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attributes #0 = { nounwind readnone }
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