ac0f64f06d
Allocating wwm-registers and per-thread VGPR operands together imposes many challenges in the way the registers are reused during allocation. There are times when regalloc reuses the registers of regular VGPRs operations for wwm-operations in a small range leading to unwantedly clobbering their inactive lanes causing correctness issues that are hard to trace. This patch splits the VGPR allocation pipeline further to allocate wwm-registers first and the regular VGPR operands in a separate pipeline. The splitting would ensure that the physical registers used for wwm allocations won't take part in the next allocation pipeline to avoid any such clobbering.
246 lines
12 KiB
YAML
246 lines
12 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2
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# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -verify-machineinstrs -run-pass=prologepilog -o - %s | FileCheck -check-prefix=GCN %s
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# We're keeping the IR around for the callees and the CCs
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--- |
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declare amdgpu_cs_chain void @callee()
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declare amdgpu_gfx void @gfx_callee()
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define amdgpu_cs_chain void @preserve_inactive_wwm() {ret void}
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define amdgpu_cs_chain void @preserve_inactive_detected_wwm() {ret void}
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define amdgpu_cs_chain void @dont_preserve_wwm_if_no_chain_calls() {ret void}
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define amdgpu_cs_chain void @dont_preserve_wwm_if_init_whole_wave() {ret void}
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define amdgpu_cs_chain void @dont_preserve_non_wwm() {ret void}
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define amdgpu_cs_chain void @dont_preserve_v0_v7() {ret void}
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define amdgpu_cs_chain void @dont_preserve_sgpr() {ret void}
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...
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---
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# Check that we preserve the inactive lanes of registers v8+ received in the
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# MachineFunctionInfo as wwmReservedRegs.
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---
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name: preserve_inactive_wwm
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tracksRegLiveness: true
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frameInfo:
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hasTailCall: true
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machineFunctionInfo:
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stackPtrOffsetReg: '$sgpr32'
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returnsVoid: true
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wwmReservedRegs:
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- '$vgpr8'
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- '$vgpr9'
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body: |
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bb.0:
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liveins: $sgpr0, $sgpr35, $vgpr8, $vgpr9
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; GCN-LABEL: name: preserve_inactive_wwm
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; GCN: liveins: $sgpr0, $sgpr35
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: renamable $sgpr4_sgpr5 = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-gotprel32-lo) @callee + 4, target-flags(amdgpu-gotprel32-hi) @callee + 12, implicit-def dead $scc
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; GCN-NEXT: renamable $sgpr4_sgpr5 = S_LOAD_DWORDX2_IMM killed renamable $sgpr4_sgpr5, 0, 0 :: (dereferenceable invariant load (p0) from got, addrspace 4)
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; GCN-NEXT: SI_CS_CHAIN_TC_W32 killed renamable $sgpr4_sgpr5, @callee, 0, -1, amdgpu_allvgprs, implicit $sgpr0, implicit $vgpr1
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renamable $sgpr4_sgpr5 = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-gotprel32-lo) @callee + 4, target-flags(amdgpu-gotprel32-hi) @callee + 12, implicit-def dead $scc
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renamable $sgpr4_sgpr5 = S_LOAD_DWORDX2_IMM killed renamable $sgpr4_sgpr5, 0, 0 :: (dereferenceable invariant load (p0) from got, addrspace 4)
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SI_CS_CHAIN_TC_W32 killed renamable $sgpr4_sgpr5, @callee, 0, -1, amdgpu_allvgprs, implicit $sgpr0, implicit $vgpr8
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...
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# Check that it also works for SGPR to VGPR spills.
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---
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name: preserve_inactive_detected_wwm
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tracksRegLiveness: true
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frameInfo:
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hasTailCall: true
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machineFunctionInfo:
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stackPtrOffsetReg: '$sgpr32'
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returnsVoid: true
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body: |
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bb.0:
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liveins: $sgpr0, $sgpr35, $vgpr8, $vgpr9
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; GCN-LABEL: name: preserve_inactive_detected_wwm
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; GCN: liveins: $sgpr0, $sgpr35, $vgpr8, $vgpr9
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: $vgpr8 = SI_SPILL_S32_TO_VGPR $sgpr35, 0, killed $vgpr8
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; GCN-NEXT: $sgpr35 = S_MOV_B32 5
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; GCN-NEXT: $sgpr35 = SI_RESTORE_S32_FROM_VGPR $vgpr8, 0
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; GCN-NEXT: renamable $vgpr8 = V_MOV_B32_e32 10, implicit $exec
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; GCN-NEXT: $vgpr9 = SI_SPILL_S32_TO_VGPR $sgpr35, 0, killed $vgpr9
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; GCN-NEXT: $sgpr35 = S_MOV_B32 5
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; GCN-NEXT: $sgpr35 = SI_RESTORE_S32_FROM_VGPR $vgpr9, 0
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; GCN-NEXT: renamable $vgpr9 = V_MOV_B32_e32 10, implicit $exec
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; GCN-NEXT: renamable $sgpr4_sgpr5 = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-gotprel32-lo) @callee + 4, target-flags(amdgpu-gotprel32-hi) @callee + 12, implicit-def dead $scc
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; GCN-NEXT: renamable $sgpr4_sgpr5 = S_LOAD_DWORDX2_IMM killed renamable $sgpr4_sgpr5, 0, 0 :: (dereferenceable invariant load (p0) from got, addrspace 4)
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; GCN-NEXT: SI_CS_CHAIN_TC_W32 killed renamable $sgpr4_sgpr5, @callee, 0, -1, amdgpu_allvgprs, implicit $sgpr0, implicit $vgpr8
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renamable $vgpr8 = SI_SPILL_S32_TO_VGPR $sgpr35, 0, killed $vgpr8
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$sgpr35 = S_MOV_B32 5
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$sgpr35 = SI_RESTORE_S32_FROM_VGPR $vgpr8, 0
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renamable $vgpr8 = V_MOV_B32_e32 10, implicit $exec
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renamable $vgpr9 = SI_SPILL_S32_TO_VGPR $sgpr35, 0, killed $vgpr9
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$sgpr35 = S_MOV_B32 5
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$sgpr35 = SI_RESTORE_S32_FROM_VGPR $vgpr9, 0
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renamable $vgpr9 = V_MOV_B32_e32 10, implicit $exec
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renamable $sgpr4_sgpr5 = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-gotprel32-lo) @callee + 4, target-flags(amdgpu-gotprel32-hi) @callee + 12, implicit-def dead $scc
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renamable $sgpr4_sgpr5 = S_LOAD_DWORDX2_IMM killed renamable $sgpr4_sgpr5, 0, 0 :: (dereferenceable invariant load (p0) from got, addrspace 4)
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SI_CS_CHAIN_TC_W32 killed renamable $sgpr4_sgpr5, @callee, 0, -1, amdgpu_allvgprs, implicit $sgpr0, implicit $vgpr8
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...
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---
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name: dont_preserve_wwm_if_no_chain_calls
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tracksRegLiveness: true
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frameInfo:
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hasTailCall: false
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machineFunctionInfo:
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stackPtrOffsetReg: '$sgpr32'
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returnsVoid: true
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wwmReservedRegs:
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- '$vgpr9'
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body: |
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bb.0:
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liveins: $sgpr35, $vgpr8
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; GCN-LABEL: name: dont_preserve_wwm_if_no_chain_calls
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; GCN: liveins: $sgpr35, $vgpr8
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: $vgpr8 = SI_SPILL_S32_TO_VGPR $sgpr35, 0, killed $vgpr8
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; GCN-NEXT: $sgpr35 = S_MOV_B32 5
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; GCN-NEXT: $sgpr35 = SI_RESTORE_S32_FROM_VGPR $vgpr8, 0
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; GCN-NEXT: renamable $vgpr8 = V_MOV_B32_e32 10, implicit $exec
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; GCN-NEXT: S_ENDPGM 0
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renamable $vgpr8 = SI_SPILL_S32_TO_VGPR $sgpr35, 0, killed $vgpr8
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$sgpr35 = S_MOV_B32 5
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$sgpr35 = SI_RESTORE_S32_FROM_VGPR $vgpr8, 0
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renamable $vgpr8 = V_MOV_B32_e32 10, implicit $exec
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S_ENDPGM 0
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...
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---
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name: dont_preserve_wwm_if_init_whole_wave
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tracksRegLiveness: true
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frameInfo:
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hasTailCall: true
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machineFunctionInfo:
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stackPtrOffsetReg: '$sgpr32'
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returnsVoid: true
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wwmReservedRegs:
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- '$vgpr8'
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- '$vgpr9'
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hasInitWholeWave: true
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body: |
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bb.0:
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liveins: $sgpr0, $sgpr35, $vgpr8, $vgpr9
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; GCN-LABEL: name: dont_preserve_wwm_if_init_whole_wave
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; GCN: liveins: $sgpr0, $sgpr35
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: renamable $sgpr4_sgpr5 = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-gotprel32-lo) @callee + 4, target-flags(amdgpu-gotprel32-hi) @callee + 12, implicit-def dead $scc
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; GCN-NEXT: renamable $sgpr4_sgpr5 = S_LOAD_DWORDX2_IMM killed renamable $sgpr4_sgpr5, 0, 0 :: (dereferenceable invariant load (p0) from got, addrspace 4)
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; GCN-NEXT: SI_CS_CHAIN_TC_W32 killed renamable $sgpr4_sgpr5, @callee, 0, -1, amdgpu_allvgprs, implicit $sgpr0, implicit $vgpr1
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renamable $sgpr4_sgpr5 = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-gotprel32-lo) @callee + 4, target-flags(amdgpu-gotprel32-hi) @callee + 12, implicit-def dead $scc
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renamable $sgpr4_sgpr5 = S_LOAD_DWORDX2_IMM killed renamable $sgpr4_sgpr5, 0, 0 :: (dereferenceable invariant load (p0) from got, addrspace 4)
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SI_CS_CHAIN_TC_W32 killed renamable $sgpr4_sgpr5, @callee, 0, -1, amdgpu_allvgprs, implicit $sgpr0, implicit $vgpr8
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...
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---
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name: dont_preserve_non_wwm
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tracksRegLiveness: true
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frameInfo:
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hasTailCall: true
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machineFunctionInfo:
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stackPtrOffsetReg: '$sgpr32'
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isChainFunction: true
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returnsVoid: true
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body: |
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bb.0:
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liveins: $sgpr0, $sgpr35, $vgpr0, $vgpr8, $vgpr16
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; GCN-LABEL: name: dont_preserve_non_wwm
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; GCN: liveins: $sgpr0, $sgpr35, $vgpr0, $vgpr8, $vgpr16
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: renamable $vgpr16 = V_MOV_B32_e32 16, implicit $exec
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; GCN-NEXT: renamable $vgpr8 = V_MOV_B32_e32 8, implicit $exec
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; GCN-NEXT: renamable $sgpr4_sgpr5 = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-gotprel32-lo) @callee + 4, target-flags(amdgpu-gotprel32-hi) @callee + 12, implicit-def dead $scc
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; GCN-NEXT: renamable $sgpr4_sgpr5 = S_LOAD_DWORDX2_IMM killed renamable $sgpr4_sgpr5, 0, 0 :: (dereferenceable invariant load (p0) from got, addrspace 4)
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; GCN-NEXT: SI_CS_CHAIN_TC_W32 killed renamable $sgpr4_sgpr5, @callee, 0, -1, amdgpu_allvgprs, implicit $sgpr0, implicit $vgpr8
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renamable $vgpr16 = V_MOV_B32_e32 16, implicit $exec
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renamable $vgpr8 = V_MOV_B32_e32 8, implicit $exec
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renamable $sgpr4_sgpr5 = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-gotprel32-lo) @callee + 4, target-flags(amdgpu-gotprel32-hi) @callee + 12, implicit-def dead $scc
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renamable $sgpr4_sgpr5 = S_LOAD_DWORDX2_IMM killed renamable $sgpr4_sgpr5, 0, 0 :: (dereferenceable invariant load (p0) from got, addrspace 4)
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SI_CS_CHAIN_TC_W32 killed renamable $sgpr4_sgpr5, @callee, 0, -1, amdgpu_allvgprs, implicit $sgpr0, implicit $vgpr8
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...
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---
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name: dont_preserve_v0_v7
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tracksRegLiveness: true
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frameInfo:
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hasTailCall: true
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machineFunctionInfo:
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stackPtrOffsetReg: '$sgpr32'
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isChainFunction: true
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returnsVoid: true
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wwmReservedRegs:
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- '$vgpr1'
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body: |
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bb.0:
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liveins: $sgpr0, $sgpr35, $vgpr0, $vgpr7, $vgpr8, $vgpr9
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; GCN-LABEL: name: dont_preserve_v0_v7
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; GCN: liveins: $sgpr0, $sgpr35, $vgpr0, $vgpr7, $vgpr8, $vgpr9
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: $vgpr0 = SI_SPILL_S32_TO_VGPR $sgpr35, 0, killed $vgpr0
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; GCN-NEXT: $sgpr35 = S_MOV_B32 5
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; GCN-NEXT: $sgpr35 = SI_RESTORE_S32_FROM_VGPR $vgpr0, 0
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; GCN-NEXT: renamable $vgpr0 = V_MOV_B32_e32 10, implicit $exec
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; GCN-NEXT: renamable $vgpr7 = V_MOV_B32_e32 16, implicit $exec
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; GCN-NEXT: renamable $vgpr8 = COPY killed renamable $vgpr0
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; GCN-NEXT: renamable $vgpr9 = COPY killed renamable $vgpr7
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; GCN-NEXT: renamable $sgpr4_sgpr5 = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-gotprel32-lo) @callee + 4, target-flags(amdgpu-gotprel32-hi) @callee + 12, implicit-def dead $scc
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; GCN-NEXT: renamable $sgpr4_sgpr5 = S_LOAD_DWORDX2_IMM killed renamable $sgpr4_sgpr5, 0, 0 :: (dereferenceable invariant load (p0) from got, addrspace 4)
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; GCN-NEXT: SI_CS_CHAIN_TC_W32 killed renamable $sgpr4_sgpr5, @callee, 0, -1, amdgpu_allvgprs, implicit $sgpr0, implicit $vgpr8, implicit $vgpr9
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renamable $vgpr0 = SI_SPILL_S32_TO_VGPR $sgpr35, 0, killed $vgpr0
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$sgpr35 = S_MOV_B32 5
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$sgpr35 = SI_RESTORE_S32_FROM_VGPR $vgpr0, 0
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renamable $vgpr0 = V_MOV_B32_e32 10, implicit $exec
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renamable $vgpr7 = V_MOV_B32_e32 16, implicit $exec
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renamable $vgpr8 = COPY killed renamable $vgpr0
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renamable $vgpr9 = COPY killed renamable $vgpr7
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renamable $sgpr4_sgpr5 = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-gotprel32-lo) @callee + 4, target-flags(amdgpu-gotprel32-hi) @callee + 12, implicit-def dead $scc
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renamable $sgpr4_sgpr5 = S_LOAD_DWORDX2_IMM killed renamable $sgpr4_sgpr5, 0, 0 :: (dereferenceable invariant load (p0) from got, addrspace 4)
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SI_CS_CHAIN_TC_W32 killed renamable $sgpr4_sgpr5, @callee, 0, -1, amdgpu_allvgprs, implicit $sgpr0, implicit $vgpr8, implicit $vgpr9
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...
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---
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name: dont_preserve_sgpr
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tracksRegLiveness: true
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frameInfo:
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hasTailCall: true
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machineFunctionInfo:
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stackPtrOffsetReg: '$sgpr32'
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returnsVoid: true
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body: |
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bb.0 (%ir-block.0):
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liveins: $sgpr0
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; GCN-LABEL: name: dont_preserve_sgpr
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; GCN: liveins: $sgpr0
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: renamable $sgpr1 = S_ADD_I32 killed renamable $sgpr0, renamable $sgpr0, implicit-def dead $scc
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; GCN-NEXT: $sgpr0 = COPY killed renamable $sgpr1
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; GCN-NEXT: renamable $sgpr4_sgpr5 = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-gotprel32-lo) @callee + 4, target-flags(amdgpu-gotprel32-hi) @callee + 12, implicit-def dead $scc
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; GCN-NEXT: renamable $sgpr4_sgpr5 = S_LOAD_DWORDX2_IMM killed renamable $sgpr4_sgpr5, 0, 0 :: (dereferenceable invariant load (p0) from got, addrspace 4)
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; GCN-NEXT: SI_CS_CHAIN_TC_W32 killed renamable $sgpr4_sgpr5, @callee, 0, -1, amdgpu_allvgprs, implicit $sgpr0
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renamable $sgpr1 = S_ADD_I32 killed renamable $sgpr0, renamable $sgpr0, implicit-def dead $scc
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$sgpr0 = COPY killed renamable $sgpr1
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renamable $sgpr4_sgpr5 = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-gotprel32-lo) @callee + 4, target-flags(amdgpu-gotprel32-hi) @callee + 12, implicit-def dead $scc
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renamable $sgpr4_sgpr5 = S_LOAD_DWORDX2_IMM killed renamable $sgpr4_sgpr5, 0, 0 :: (dereferenceable invariant load (p0) from got, addrspace 4)
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SI_CS_CHAIN_TC_W32 killed renamable $sgpr4_sgpr5, @callee, 0, -1, amdgpu_allvgprs, implicit $sgpr0
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...
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