Before llvm20, (void)__sync_fetch_and_add(...) always generates locked xadd insns. In linux kernel upstream discussion [1], it is found that for arm64 architecture, the original semantics of (void)__sync_fetch_and_add(...), i.e., __atomic_fetch_add(...), is preferred in order for jit to emit proper native barrier insns. In llvm commits [2] and [3], (void)__sync_fetch_and_add(...) will generate the following insns: - for cpu v1/v2: locked xadd insns to keep backward compatibility - for cpu v3/v4: __atomic_fetch_add() insns To ensure proper barrier semantics for (void)__sync_fetch_and_add(...), cpu v3/v4 is recommended. This patch enables cpu=v3 as the default cpu version. For users wanting to use cpu v1, -mcpu=v1 needs to be explicitly added to clang/llc command line. [1] https://lore.kernel.org/bpf/ZqqiQQWRnz7H93Hc@google.com/T/#mb68d67bc8f39e35a0c3db52468b9de59b79f021f [2] https://github.com/llvm/llvm-project/pull/101428 [3] https://github.com/llvm/llvm-project/pull/106494
61 lines
2.1 KiB
LLVM
61 lines
2.1 KiB
LLVM
; RUN: llc -mtriple=bpfel -mcpu=v1 -filetype=obj -o %t.el < %s
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; RUN: llvm-objdump -r %t.el | FileCheck --check-prefix=RELOC %s
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; RUN: llvm-objdump --no-print-imm-hex -d --no-show-raw-insn %t.el | FileCheck --check-prefix=DUMP %s
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; RUN: llc -mtriple=bpfeb -mcpu=v1 -filetype=obj -o %t.eb < %s
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; RUN: llvm-objdump -r %t.eb | FileCheck --check-prefix=RELOC %s
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; RUN: llvm-objdump --no-print-imm-hex -d --no-show-raw-insn %t.eb | FileCheck --check-prefix=DUMP %s
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; source code:
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; static __attribute__((noinline)) __attribute__((section("sec1")))
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; int add(int a, int b) {
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; return a + b;
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; }
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; static __attribute__((noinline))
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; int sub(int a, int b) {
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; return a - b;
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; }
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; int test(int a, int b) {
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; return add(a, b) + sub(a, b);
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; }
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; compilation flag:
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; clang -target bpf -O2 -emit-llvm -S test.c
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define dso_local i32 @test(i32 %a, i32 %b) local_unnamed_addr #0 {
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entry:
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%call = tail call fastcc i32 @add(i32 %a, i32 %b)
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%call1 = tail call fastcc i32 @sub(i32 %a, i32 %b)
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%add = add nsw i32 %call1, %call
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ret i32 %add
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}
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define internal fastcc i32 @add(i32 %a, i32 %b) unnamed_addr #1 section "sec1" {
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entry:
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%add = add nsw i32 %b, %a
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ret i32 %add
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}
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; Function Attrs: nofree noinline norecurse nosync nounwind readnone willreturn mustprogress
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define internal fastcc i32 @sub(i32 %a, i32 %b) unnamed_addr #1 {
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entry:
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%sub = sub nsw i32 %a, %b
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ret i32 %sub
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}
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; DUMP: .text:
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; DUMP-EMPTY:
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; DUMP-NEXT: <test>
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; DUMP-NEXT: r[[#]] = r[[#]]
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; DUMP-NEXT: r[[#]] = r[[#]]
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; DUMP-NEXT: call -1
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; DUMP: sec1:
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; DUMP-EMPTY:
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; DUMP-NEXT: <add>
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; RELOC: RELOCATION RECORDS FOR [.text]:
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; RELOC: R_BPF_64_32 sec1
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; RELOC-NOT: R_BPF_64_32
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attributes #0 = { nofree norecurse nosync nounwind readnone willreturn mustprogress "frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" }
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attributes #1 = { nofree noinline norecurse nosync nounwind readnone willreturn mustprogress "frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" }
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