e6bf48d110
As of revea222be0d, LLVMs assembler will actually try to honour the "fill value" part of p2align directives. X86 printed these as 0x90, which isn't actually what it wanted: we want multi-byte nops for .text padding. Compiling via a textual assembly file produces single-byte nop padding sinceea222be0dbut the built-in assembler will produce multi-byte nops. This divergent behaviour is undesirable. To fix: don't set the byte padding field for x86, which allows the assembler to pick multi-byte nops. Test that we get the same multi-byte padding when compiled via textual assembly or directly to object file. Added same-align-bytes-with-llasm-llobj.ll to that effect, updated numerous other tests to not contain check-lines for the explicit padding.
220 lines
6.9 KiB
LLVM
220 lines
6.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s
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define <8 x i32> @cmp00(<8 x float> %a, <8 x float> %b) nounwind {
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; CHECK-LABEL: cmp00:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vcmpltps %ymm1, %ymm0, %ymm0
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; CHECK-NEXT: retq
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%bincmp = fcmp olt <8 x float> %a, %b
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%s = sext <8 x i1> %bincmp to <8 x i32>
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ret <8 x i32> %s
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}
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define <4 x i64> @cmp01(<4 x double> %a, <4 x double> %b) nounwind {
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; CHECK-LABEL: cmp01:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vcmpltpd %ymm1, %ymm0, %ymm0
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; CHECK-NEXT: retq
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%bincmp = fcmp olt <4 x double> %a, %b
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%s = sext <4 x i1> %bincmp to <4 x i64>
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ret <4 x i64> %s
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}
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declare void @scale() nounwind
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define void @render(double %a0) nounwind {
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; CHECK-LABEL: render:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pushq %rbx
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; CHECK-NEXT: subq $16, %rsp
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; CHECK-NEXT: vmovsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: testb %al, %al
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; CHECK-NEXT: jne .LBB2_5
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; CHECK-NEXT: # %bb.1: # %for.cond5.preheader
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; CHECK-NEXT: movb $1, %bl
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; CHECK-NEXT: .p2align 4
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; CHECK-NEXT: .LBB2_2: # %for.cond5
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; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: testb %bl, %bl
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; CHECK-NEXT: jne .LBB2_2
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; CHECK-NEXT: # %bb.3: # %for.body33.preheader
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; CHECK-NEXT: # in Loop: Header=BB2_2 Depth=1
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; CHECK-NEXT: vmovsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Reload
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; CHECK-NEXT: # xmm0 = mem[0],zero
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; CHECK-NEXT: vucomisd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
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; CHECK-NEXT: jne .LBB2_4
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; CHECK-NEXT: jnp .LBB2_2
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; CHECK-NEXT: .LBB2_4: # %if.then
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; CHECK-NEXT: # in Loop: Header=BB2_2 Depth=1
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; CHECK-NEXT: callq scale@PLT
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; CHECK-NEXT: jmp .LBB2_2
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; CHECK-NEXT: .LBB2_5: # %for.end52
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; CHECK-NEXT: addq $16, %rsp
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; CHECK-NEXT: popq %rbx
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; CHECK-NEXT: retq
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entry:
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br i1 undef, label %for.cond5, label %for.end52
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for.cond5:
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%or.cond = and i1 undef, false
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br i1 %or.cond, label %for.body33, label %for.cond5
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for.cond30:
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br i1 false, label %for.body33, label %for.cond5
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for.body33:
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%tobool = fcmp une double %a0, 0.000000e+00
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br i1 %tobool, label %if.then, label %for.cond30
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if.then:
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call void @scale()
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br label %for.cond30
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for.end52:
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ret void
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}
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define <8 x i32> @int256_cmp(<8 x i32> %i, <8 x i32> %j) nounwind {
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; CHECK-LABEL: int256_cmp:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vextractf128 $1, %ymm0, %xmm2
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; CHECK-NEXT: vextractf128 $1, %ymm1, %xmm3
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; CHECK-NEXT: vpcmpgtd %xmm2, %xmm3, %xmm2
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; CHECK-NEXT: vpcmpgtd %xmm0, %xmm1, %xmm0
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; CHECK-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
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; CHECK-NEXT: retq
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%bincmp = icmp slt <8 x i32> %i, %j
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%x = sext <8 x i1> %bincmp to <8 x i32>
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ret <8 x i32> %x
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}
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define <4 x i64> @v4i64_cmp(<4 x i64> %i, <4 x i64> %j) nounwind {
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; CHECK-LABEL: v4i64_cmp:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vextractf128 $1, %ymm0, %xmm2
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; CHECK-NEXT: vextractf128 $1, %ymm1, %xmm3
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; CHECK-NEXT: vpcmpgtq %xmm2, %xmm3, %xmm2
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; CHECK-NEXT: vpcmpgtq %xmm0, %xmm1, %xmm0
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; CHECK-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
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; CHECK-NEXT: retq
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%bincmp = icmp slt <4 x i64> %i, %j
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%x = sext <4 x i1> %bincmp to <4 x i64>
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ret <4 x i64> %x
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}
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define <16 x i16> @v16i16_cmp(<16 x i16> %i, <16 x i16> %j) nounwind {
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; CHECK-LABEL: v16i16_cmp:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vextractf128 $1, %ymm0, %xmm2
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; CHECK-NEXT: vextractf128 $1, %ymm1, %xmm3
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; CHECK-NEXT: vpcmpgtw %xmm2, %xmm3, %xmm2
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; CHECK-NEXT: vpcmpgtw %xmm0, %xmm1, %xmm0
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; CHECK-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
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; CHECK-NEXT: retq
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%bincmp = icmp slt <16 x i16> %i, %j
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%x = sext <16 x i1> %bincmp to <16 x i16>
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ret <16 x i16> %x
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}
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define <32 x i8> @v32i8_cmp(<32 x i8> %i, <32 x i8> %j) nounwind {
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; CHECK-LABEL: v32i8_cmp:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vextractf128 $1, %ymm0, %xmm2
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; CHECK-NEXT: vextractf128 $1, %ymm1, %xmm3
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; CHECK-NEXT: vpcmpgtb %xmm2, %xmm3, %xmm2
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; CHECK-NEXT: vpcmpgtb %xmm0, %xmm1, %xmm0
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; CHECK-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
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; CHECK-NEXT: retq
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%bincmp = icmp slt <32 x i8> %i, %j
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%x = sext <32 x i1> %bincmp to <32 x i8>
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ret <32 x i8> %x
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}
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define <8 x i32> @int256_cmpeq(<8 x i32> %i, <8 x i32> %j) nounwind {
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; CHECK-LABEL: int256_cmpeq:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vextractf128 $1, %ymm1, %xmm2
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; CHECK-NEXT: vextractf128 $1, %ymm0, %xmm3
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; CHECK-NEXT: vpcmpeqd %xmm2, %xmm3, %xmm2
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; CHECK-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
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; CHECK-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
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; CHECK-NEXT: retq
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%bincmp = icmp eq <8 x i32> %i, %j
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%x = sext <8 x i1> %bincmp to <8 x i32>
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ret <8 x i32> %x
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}
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define <4 x i64> @v4i64_cmpeq(<4 x i64> %i, <4 x i64> %j) nounwind {
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; CHECK-LABEL: v4i64_cmpeq:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vextractf128 $1, %ymm1, %xmm2
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; CHECK-NEXT: vextractf128 $1, %ymm0, %xmm3
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; CHECK-NEXT: vpcmpeqq %xmm2, %xmm3, %xmm2
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; CHECK-NEXT: vpcmpeqq %xmm1, %xmm0, %xmm0
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; CHECK-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
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; CHECK-NEXT: retq
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%bincmp = icmp eq <4 x i64> %i, %j
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%x = sext <4 x i1> %bincmp to <4 x i64>
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ret <4 x i64> %x
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}
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define <16 x i16> @v16i16_cmpeq(<16 x i16> %i, <16 x i16> %j) nounwind {
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; CHECK-LABEL: v16i16_cmpeq:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vextractf128 $1, %ymm1, %xmm2
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; CHECK-NEXT: vextractf128 $1, %ymm0, %xmm3
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; CHECK-NEXT: vpcmpeqw %xmm2, %xmm3, %xmm2
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; CHECK-NEXT: vpcmpeqw %xmm1, %xmm0, %xmm0
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; CHECK-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
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; CHECK-NEXT: retq
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%bincmp = icmp eq <16 x i16> %i, %j
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%x = sext <16 x i1> %bincmp to <16 x i16>
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ret <16 x i16> %x
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}
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define <32 x i8> @v32i8_cmpeq(<32 x i8> %i, <32 x i8> %j) nounwind {
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; CHECK-LABEL: v32i8_cmpeq:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vextractf128 $1, %ymm1, %xmm2
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; CHECK-NEXT: vextractf128 $1, %ymm0, %xmm3
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; CHECK-NEXT: vpcmpeqb %xmm2, %xmm3, %xmm2
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; CHECK-NEXT: vpcmpeqb %xmm1, %xmm0, %xmm0
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; CHECK-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
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; CHECK-NEXT: retq
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%bincmp = icmp eq <32 x i8> %i, %j
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%x = sext <32 x i1> %bincmp to <32 x i8>
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ret <32 x i8> %x
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}
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;; Scalar comparison
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define i32 @scalarcmpA(double %a0) uwtable ssp {
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; CHECK-LABEL: scalarcmpA:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vxorpd %xmm1, %xmm1, %xmm1
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; CHECK-NEXT: vcmpeqsd %xmm1, %xmm0, %xmm0
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; CHECK-NEXT: vmovq %xmm0, %rax
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; CHECK-NEXT: andl $1, %eax
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; CHECK-NEXT: # kill: def $eax killed $eax killed $rax
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; CHECK-NEXT: retq
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%cmp29 = fcmp oeq double %a0, 0.000000e+00
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%res = zext i1 %cmp29 to i32
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ret i32 %res
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}
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define i32 @scalarcmpB(float %a0) uwtable ssp {
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; CHECK-LABEL: scalarcmpB:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vxorps %xmm1, %xmm1, %xmm1
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; CHECK-NEXT: vcmpeqss %xmm1, %xmm0, %xmm0
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; CHECK-NEXT: vmovd %xmm0, %eax
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; CHECK-NEXT: andl $1, %eax
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; CHECK-NEXT: retq
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%cmp29 = fcmp oeq float %a0, 0.000000e+00
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%res = zext i1 %cmp29 to i32
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ret i32 %res
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}
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