0d471b3f64
This patch fixes https://github.com/llvm/llvm-project/issues/17204. If a base pointer is used in a function, and it is clobbered by an instruction (typically an inline asm), current register allocator can't handle this situation, so BP becomes garbage after those instructions. It can also occur to FP in theory. We can spill and reload FP/BP registers around those instructions. But normal spill/reload instructions also use FP/BP, so we can't spill them into normal spill slots, instead we spill them into the top of stack by using SP register.
119 lines
4.0 KiB
LLVM
119 lines
4.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
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; RUN: llc < %s | FileCheck %s
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target datalayout = "e-m:x-p:32:32-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:32-n8:16:32-a:0:32-S32"
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target triple = "i386-pc-windows-gnu"
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; This function uses esi as base pointer, the inline asm clobbers esi, so we
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; should save esi using esp before the inline asm, and restore esi after the
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; inline asm.
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define i32 @clober_bp() {
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; CHECK-LABEL: clober_bp:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pushl %ebp
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; CHECK-NEXT: .cfi_def_cfa_offset 8
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; CHECK-NEXT: .cfi_offset %ebp, -8
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; CHECK-NEXT: movl %esp, %ebp
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; CHECK-NEXT: .cfi_def_cfa_register %ebp
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; CHECK-NEXT: pushl %edi
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; CHECK-NEXT: pushl %esi
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; CHECK-NEXT: andl $-16, %esp
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; CHECK-NEXT: subl $16, %esp
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; CHECK-NEXT: movl %esp, %esi
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; CHECK-NEXT: .cfi_offset %esi, -16
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; CHECK-NEXT: .cfi_offset %edi, -12
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; CHECK-NEXT: movl $4, 12(%esi)
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; CHECK-NEXT: movl 12(%esi), %eax
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; CHECK-NEXT: addl $3, %eax
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; CHECK-NEXT: andl $-4, %eax
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; CHECK-NEXT: calll __alloca
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; CHECK-NEXT: movl %esp, %eax
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; CHECK-NEXT: andl $-16, %eax
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; CHECK-NEXT: movl %eax, %esp
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; CHECK-NEXT: movl $1, (%eax)
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; CHECK-NEXT: leal 8(%esi), %edi
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; CHECK-NEXT: movl $4, %ecx
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; CHECK-NEXT: pushl %esi
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; CHECK-NEXT: movl %eax, %esi
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; CHECK-NEXT: #APP
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; CHECK-NEXT: rep movsb (%esi), %es:(%edi)
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: popl %esi
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; CHECK-NEXT: movl 8(%esi), %eax
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; CHECK-NEXT: leal -8(%ebp), %esp
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; CHECK-NEXT: popl %esi
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; CHECK-NEXT: popl %edi
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; CHECK-NEXT: popl %ebp
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; CHECK-NEXT: retl
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entry:
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%size = alloca i32, align 4
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%g = alloca i32, align 4
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store volatile i32 4, ptr %size, align 4
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%len = load volatile i32, ptr %size, align 4
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%var_array = alloca i8, i32 %len, align 16
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store i32 1, ptr %var_array, align 16
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%nil = call { ptr, ptr, i32 } asm "rep movsb", "={di},={si},={cx},0,1,2,~{memory},~{dirflag},~{fpsr},~{flags}"(ptr %g, ptr %var_array, i32 4)
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%retval = load i32, ptr %g, align 4
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ret i32 %retval
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}
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; This function has the same code except the inline asm also clobbers
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; frame pointer.
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define i32 @clobber_bpfp() {
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; CHECK-LABEL: clobber_bpfp:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pushl %ebp
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; CHECK-NEXT: .cfi_def_cfa_offset 8
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; CHECK-NEXT: .cfi_offset %ebp, -8
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; CHECK-NEXT: movl %esp, %ebp
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; CHECK-NEXT: .cfi_def_cfa_register %ebp
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; CHECK-NEXT: pushl %edi
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; CHECK-NEXT: pushl %esi
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; CHECK-NEXT: andl $-16, %esp
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; CHECK-NEXT: subl $16, %esp
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; CHECK-NEXT: movl %esp, %esi
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; CHECK-NEXT: .cfi_offset %esi, -16
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; CHECK-NEXT: .cfi_offset %edi, -12
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; CHECK-NEXT: movl $4, 12(%esi)
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; CHECK-NEXT: movl 12(%esi), %eax
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; CHECK-NEXT: addl $3, %eax
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; CHECK-NEXT: andl $-4, %eax
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; CHECK-NEXT: calll __alloca
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; CHECK-NEXT: movl %esp, %eax
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; CHECK-NEXT: andl $-16, %eax
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; CHECK-NEXT: movl %eax, %esp
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; CHECK-NEXT: movl $1, (%eax)
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; CHECK-NEXT: leal 8(%esi), %edi
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; CHECK-NEXT: movl $4, %ecx
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; CHECK-NEXT: pushl %ebp
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; CHECK-NEXT: pushl %esi
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; CHECK-NEXT: .cfi_remember_state
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; CHECK-NEXT: .cfi_escape 0x0f, 0x06, 0x74, 0x04, 0x06, 0x11, 0x08, 0x22 #
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; CHECK-NEXT: movl %eax, %esi
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; CHECK-NEXT: #APP
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; CHECK-NEXT: rep movsb (%esi), %es:(%edi)
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: popl %esi
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; CHECK-NEXT: popl %ebp
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; CHECK-NEXT: .cfi_restore_state
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; CHECK-NEXT: movl 8(%esi), %eax
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; CHECK-NEXT: leal -8(%ebp), %esp
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; CHECK-NEXT: popl %esi
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; CHECK-NEXT: popl %edi
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; CHECK-NEXT: popl %ebp
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; CHECK-NEXT: retl
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entry:
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%size = alloca i32, align 4
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%g = alloca i32, align 4
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store volatile i32 4, ptr %size, align 4
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%len = load volatile i32, ptr %size, align 4
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%var_array = alloca i8, i32 %len, align 16
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store i32 1, ptr %var_array, align 16
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%nil = call { ptr, ptr, i32 } asm "rep movsb", "={di},={si},={cx},0,1,2,~{memory},~{dirflag},~{fpsr},~{flags},~{ebp}"(ptr %g, ptr %var_array, i32 4)
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%retval = load i32, ptr %g, align 4
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ret i32 %retval
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}
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