b7e4fba6e5
After #98505, the textual IR keyword `x86_mmx` was temporarily made to parse as `<1 x i64>`, so as not to require a lot of test update noise. This completes the removal of the type, by removing the`x86_mmx` keyword from the IR parser, and making the (now no-op) test updates via `sed -i 's/\bx86_mmx\b/<1 x i64>/g' $(git grep -l x86_mmx llvm/test/)`. Resulting bitcasts from <1 x i64> to itself were then manually deleted. Changes to llvm/test/Bitcode/compatibility-$VERSION.ll were reverted, as they're intended to be equivalent to the .bc file, if parsed by old LLVM, so shouldn't be updated. A few tests were removed, as they're no longer testing anything, in the following files: - llvm/test/Transforms/GlobalOpt/x86_mmx_load.ll - llvm/test/Transforms/InstCombine/cast.ll - llvm/test/Transforms/InstSimplify/ConstProp/gep-zeroinit-vector.ll Works towards issue #98272.
21 lines
643 B
LLVM
21 lines
643 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple x86_64-unknown-unknown -mattr=mmx | FileCheck %s
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target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
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; PR23246
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; We're really only interested in doing something sane with the shuffle.
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define <2 x i64> @test(<1 x i64> %a) #0 {
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; CHECK-LABEL: test:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: movq %rdi, %xmm0
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,0,1]
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; CHECK-NEXT: retq
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entry:
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%s = shufflevector <1 x i64> %a, <1 x i64> undef, <2 x i32> <i32 undef, i32 0>
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ret <2 x i64> %s
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}
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attributes #0 = { nounwind }
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