26fa399012
The issue with the handling of the SUBREG_TO_REG is that we don't join the subranges correctly when we join live ranges across the SUBREG_TO_REG. For example when joining across this: ``` 32B %2:gr64_nosp = SUBREG_TO_REG 0, %0:gr32, %subreg.sub_32bit ``` we want to join these live ranges: ``` %0 [16r,32r:0) 0@16r weight:0.000000e+00 %2 [32r,112r:0) 0@32r weight:0.000000e+00 ``` Before the fix the range for the resulting merged `%2` is: ``` %2 [16r,112r:0) 0@16r weight:0.000000e+00 ``` After the fix it is now this: ``` %2 [16r,112r:0) 0@16r L000000000000000F [16r,112r:0) 0@16r weight:0.000000e+00 ``` Two tests are added to this fix. The X86 test fails without the patch. The PowerPC test passes with and without the patch but is added as a way track future possible failures when register classes are changed in a future patch.
38 lines
2.0 KiB
YAML
38 lines
2.0 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
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# RUN: llc -mtriple x86_64-unknown-unknown %s \
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# RUN: -verify-coalescing -enable-subreg-liveness \
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# RUN: --run-pass=register-coalescer -o - | FileCheck %s
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# Check that the register coalescer correctly handles merging live ranges over
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# SUBREG_TO_REG on X86. The -verify-coalescing option will give an error if
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# this is incorrect.
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---
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name: test1
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alignment: 16
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tracksRegLiveness: true
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body: |
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bb.0:
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; CHECK-LABEL: name: test1
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; CHECK: undef [[MOV32rm:%[0-9]+]].sub_32bit:gr64_nosp = MOV32rm undef %1:gr64, 1, $noreg, 0, $noreg :: (volatile load (s32) from `ptr undef`)
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; CHECK-NEXT: undef [[MOV32rm1:%[0-9]+]].sub_32bit:gr64_with_sub_8bit = MOV32rm undef %4:gr64, 1, $noreg, 0, $noreg :: (volatile load (s32) from `ptr undef`)
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; CHECK-NEXT: [[MOV32rm1:%[0-9]+]]:gr64_with_sub_8bit = SHL64ri [[MOV32rm1]], 32, implicit-def dead $eflags
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; CHECK-NEXT: [[LEA64r:%[0-9]+]]:gr64_with_sub_8bit = LEA64r [[MOV32rm1]], 1, [[MOV32rm]], 256, $noreg
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; CHECK-NEXT: [[LEA64r:%[0-9]+]]:gr64_with_sub_8bit = SHR64ri [[LEA64r]], 8, implicit-def dead $eflags
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; CHECK-NEXT: MOV32mr undef %10:gr64, 1, $noreg, 0, $noreg, [[LEA64r]].sub_32bit :: (volatile store (s32) into `ptr undef`)
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; CHECK-NEXT: RET 0, undef $eax
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%0:gr32 = MOV32rm undef %1:gr64, 1, $noreg, 0, $noreg :: (volatile load (s32) from `ptr undef`)
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%2:gr64_nosp = SUBREG_TO_REG 0, killed %0, %subreg.sub_32bit
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%3:gr32 = MOV32rm undef %4:gr64, 1, $noreg, 0, $noreg :: (volatile load (s32) from `ptr undef`)
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%5:gr64 = SUBREG_TO_REG 0, killed %3, %subreg.sub_32bit
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%6:gr64 = COPY killed %5
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%6:gr64 = SHL64ri %6, 32, implicit-def dead $eflags
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%7:gr64 = LEA64r killed %6, 1, killed %2, 256, $noreg
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%8:gr64 = COPY killed %7
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%8:gr64 = SHR64ri %8, 8, implicit-def dead $eflags
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%9:gr32 = COPY killed %8.sub_32bit
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MOV32mr undef %10:gr64, 1, $noreg, 0, $noreg, killed %9 :: (volatile store (s32) into `ptr undef`)
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RET 0, undef $eax
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...
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