Paul Walker 5bb34803a4 [NFC] Migrate tests to use autoupdate for CHECK lines.

2024-10-22 12:55:15 +00:00

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2012-04-23-Neon-Intrinsics.ll

[NFC] Migrate tests to use autoupdate for CHECK lines.

2024-10-22 12:55:15 +00:00

aes-intrinsics.ll

[NFC] Migrate tests to use autoupdate for CHECK lines.

2024-10-22 12:55:15 +00:00

demandelts.ll

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dmb-intrinsics.ll

[AArch64][InstCombine] Eliminate redundant barrier intrinsics (#112023)

2024-10-17 21:04:04 +04:00

lit.local.cfg

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neon-min-max-intrinsics.ll

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sme-svcount.ll

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sve-inst-combine-cmpne.ll

[instCombine][bugfix] Fix crash caused by using of cast in instCombineSVECmpNE (#102472)

2024-08-23 15:30:51 +01:00

sve-intrinsic-abs-srshl.ll

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sve-intrinsic-comb-all-active-lanes-cvt.ll

[AArch64][SVE] Fix definition of bfloat fcvt intrinsics. (#110281)

2024-10-03 12:36:01 +01:00

sve-intrinsic-comb-m-forms-no-active-lanes.ll

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sve-intrinsic-comb-no-active-lanes-cmp.ll

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sve-intrinsic-comb-no-active-lanes-cvt.ll

[AArch64][SVE] Fix definition of bfloat fcvt intrinsics. (#110281)

2024-10-03 12:36:01 +01:00

sve-intrinsic-comb-no-active-lanes-loads.ll

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sve-intrinsic-comb-no-active-lanes-prf.ll

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sve-intrinsic-comb-no-active-lanes-stores.ll

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sve-intrinsic-comb-no-active-lanes-to-zero.ll

[AArch64] replace SVE intrinsics with no active lanes with zero (#107413)

2024-09-09 10:28:01 +01:00

sve-intrinsic-dupqlane.ll

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sve-intrinsic-fma-binops.ll

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sve-intrinsic-fmul_u-idempotency.ll

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sve-intrinsic-fmul-idempotency.ll

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sve-intrinsic-gatherscatter.ll

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sve-intrinsic-insr.ll

[LLVM][InstCombine][AArch64] sve.insr(splat(x), x) ==> splat(x) (#109445)

2024-09-24 15:11:36 +01:00

sve-intrinsic-loadstore.ll

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sve-intrinsic-mul_u-idempotency.ll

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sve-intrinsic-mul-idempotency.ll

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sve-intrinsic-muladdsub.ll

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sve-intrinsic-opts-clast.ll

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sve-intrinsic-opts-cmpne.ll

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sve-intrinsic-opts-counting-elems.ll

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sve-intrinsic-opts-dup.ll

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sve-intrinsic-opts-lasta-lastb.ll

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sve-intrinsic-opts-reinterpret.ll

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sve-intrinsic-opts-unpkhi-unpklo.ll

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sve-intrinsic-opts-uzp1.ll

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sve-intrinsic-opts-zip.ll

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sve-intrinsic-sdiv.ll

[AArch64][InstCombine] Bail from combining SRAD on +/-1 divisor (#109274)

2024-09-20 13:53:02 +01:00

sve-intrinsic-sel.ll

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sve-intrinsic-strictfp.ll

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sve-intrinsic-tbl-dupx.ll

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sve-intrinsic-to-svbool-binops.ll

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sve-intrinsics-combine-to-u-forms.ll

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sve-intrinsics-ptest.ll

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sve-intrinsics-rdffr-predication.ll

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tbl1.ll

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VectorUtils_heuristics.ll

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