a105877646
The idea behind this canonicalization is that it allows us to handle less patterns, because we know that some will be canonicalized away. This is indeed very useful to e.g. know that constants are always on the right. However, this is only useful if the canonicalization is actually reliable. This is the case for constants, but not for arguments: Moving these to the right makes it look like the "more complex" expression is guaranteed to be on the left, but this is not actually the case in practice. It fails as soon as you replace the argument with another instruction. The end result is that it looks like things correctly work in tests, while they actually don't. We use the "thwart complexity-based canonicalization" trick to handle this in tests, but it's often a challenge for new contributors to get this right, and based on the regressions this PR originally exposed, we clearly don't get this right in many cases. For this reason, I think that it's better to remove this complexity canonicalization. It will make it much easier to write tests for commuted cases and make sure that they are handled.
363 lines
12 KiB
LLVM
363 lines
12 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -passes=instcombine -S | FileCheck %s
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; It is a miscompile in most of these tests if we
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; execute div/rem without freezing the potentially
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; poison condition value.
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define i5 @sdiv_common_divisor(i1 %b, i5 %x, i5 %y, i5 %z) {
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; CHECK-LABEL: @sdiv_common_divisor(
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; CHECK-NEXT: [[TMP1:%.*]] = freeze i1 [[B:%.*]]
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; CHECK-NEXT: [[SEL_V:%.*]] = select i1 [[TMP1]], i5 [[Z:%.*]], i5 [[Y:%.*]]
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; CHECK-NEXT: [[SEL:%.*]] = sdiv i5 [[SEL_V]], [[X:%.*]]
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; CHECK-NEXT: ret i5 [[SEL]]
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;
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%r1 = sdiv i5 %y, %x
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%r2 = sdiv i5 %z, %x
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%sel = select i1 %b, i5 %r2, i5 %r1
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ret i5 %sel
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}
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define i5 @srem_common_divisor(i1 %b, i5 %x, i5 %y, i5 %z) {
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; CHECK-LABEL: @srem_common_divisor(
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; CHECK-NEXT: [[TMP1:%.*]] = freeze i1 [[B:%.*]]
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; CHECK-NEXT: [[SEL_V:%.*]] = select i1 [[TMP1]], i5 [[Z:%.*]], i5 [[Y:%.*]]
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; CHECK-NEXT: [[SEL:%.*]] = srem i5 [[SEL_V]], [[X:%.*]]
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; CHECK-NEXT: ret i5 [[SEL]]
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;
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%r1 = srem i5 %y, %x
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%r2 = srem i5 %z, %x
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%sel = select i1 %b, i5 %r2, i5 %r1
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ret i5 %sel
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}
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; This is ok without freeze because UB can only happen with x==0,
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; and that occurs in the original code.
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define i5 @udiv_common_divisor(i1 %b, i5 %x, i5 %y, i5 %z) {
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; CHECK-LABEL: @udiv_common_divisor(
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; CHECK-NEXT: [[SEL_V:%.*]] = select i1 [[B:%.*]], i5 [[Z:%.*]], i5 [[Y:%.*]]
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; CHECK-NEXT: [[SEL:%.*]] = udiv i5 [[SEL_V]], [[X:%.*]]
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; CHECK-NEXT: ret i5 [[SEL]]
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;
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%r1 = udiv i5 %y, %x
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%r2 = udiv i5 %z, %x
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%sel = select i1 %b, i5 %r2, i5 %r1
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ret i5 %sel
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}
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; This is ok without freeze because UB can only happen with x==0,
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; and that occurs in the original code.
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define i5 @urem_common_divisor(i1 %b, i5 %x, i5 %y, i5 %z) {
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; CHECK-LABEL: @urem_common_divisor(
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; CHECK-NEXT: [[SEL_V:%.*]] = select i1 [[B:%.*]], i5 [[Z:%.*]], i5 [[Y:%.*]]
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; CHECK-NEXT: [[SEL:%.*]] = urem i5 [[SEL_V]], [[X:%.*]]
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; CHECK-NEXT: ret i5 [[SEL]]
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;
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%r1 = urem i5 %y, %x
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%r2 = urem i5 %z, %x
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%sel = select i1 %b, i5 %r2, i5 %r1
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ret i5 %sel
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}
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define i5 @sdiv_common_dividend(i1 %b, i5 %x, i5 %y, i5 %z) {
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; CHECK-LABEL: @sdiv_common_dividend(
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; CHECK-NEXT: [[TMP1:%.*]] = freeze i1 [[B:%.*]]
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; CHECK-NEXT: [[SEL_V:%.*]] = select i1 [[TMP1]], i5 [[Z:%.*]], i5 [[Y:%.*]]
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; CHECK-NEXT: [[SEL:%.*]] = sdiv i5 [[X:%.*]], [[SEL_V]]
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; CHECK-NEXT: ret i5 [[SEL]]
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;
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%r1 = sdiv i5 %x, %y
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%r2 = sdiv i5 %x, %z
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%sel = select i1 %b, i5 %r2, i5 %r1
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ret i5 %sel
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}
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define i5 @srem_common_dividend(i1 %b, i5 %x, i5 %y, i5 %z) {
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; CHECK-LABEL: @srem_common_dividend(
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; CHECK-NEXT: [[TMP1:%.*]] = freeze i1 [[B:%.*]]
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; CHECK-NEXT: [[SEL_V:%.*]] = select i1 [[TMP1]], i5 [[Z:%.*]], i5 [[Y:%.*]]
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; CHECK-NEXT: [[SEL:%.*]] = srem i5 [[X:%.*]], [[SEL_V]]
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; CHECK-NEXT: ret i5 [[SEL]]
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;
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%r1 = srem i5 %x, %y
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%r2 = srem i5 %x, %z
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%sel = select i1 %b, i5 %r2, i5 %r1
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ret i5 %sel
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}
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define i5 @udiv_common_dividend(i1 %b, i5 %x, i5 %y, i5 %z) {
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; CHECK-LABEL: @udiv_common_dividend(
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; CHECK-NEXT: [[TMP1:%.*]] = freeze i1 [[B:%.*]]
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; CHECK-NEXT: [[SEL_V:%.*]] = select i1 [[TMP1]], i5 [[Z:%.*]], i5 [[Y:%.*]]
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; CHECK-NEXT: [[SEL:%.*]] = udiv i5 [[X:%.*]], [[SEL_V]]
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; CHECK-NEXT: ret i5 [[SEL]]
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;
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%r1 = udiv i5 %x, %y
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%r2 = udiv i5 %x, %z
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%sel = select i1 %b, i5 %r2, i5 %r1
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ret i5 %sel
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}
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define i5 @urem_common_dividend(i1 %b, i5 %x, i5 %y, i5 %z) {
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; CHECK-LABEL: @urem_common_dividend(
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; CHECK-NEXT: [[TMP1:%.*]] = freeze i1 [[B:%.*]]
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; CHECK-NEXT: [[SEL_V:%.*]] = select i1 [[TMP1]], i5 [[Z:%.*]], i5 [[Y:%.*]]
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; CHECK-NEXT: [[SEL:%.*]] = urem i5 [[X:%.*]], [[SEL_V]]
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; CHECK-NEXT: ret i5 [[SEL]]
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;
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%r1 = urem i5 %x, %y
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%r2 = urem i5 %x, %z
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%sel = select i1 %b, i5 %r2, i5 %r1
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ret i5 %sel
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}
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; Repeat the above tests, but guarantee that the select
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; condition is not poison via argument attribute. That
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; makes it safe to execute the select before div/rem
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; without needing to freeze the condition.
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define i5 @sdiv_common_divisor_defined_cond(i1 noundef %b, i5 %x, i5 %y, i5 %z) {
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; CHECK-LABEL: @sdiv_common_divisor_defined_cond(
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; CHECK-NEXT: [[SEL_V:%.*]] = select i1 [[B:%.*]], i5 [[Z:%.*]], i5 [[Y:%.*]]
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; CHECK-NEXT: [[SEL:%.*]] = sdiv i5 [[SEL_V]], [[X:%.*]]
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; CHECK-NEXT: ret i5 [[SEL]]
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;
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%r1 = sdiv i5 %y, %x
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%r2 = sdiv i5 %z, %x
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%sel = select i1 %b, i5 %r2, i5 %r1
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ret i5 %sel
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}
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define i5 @srem_common_divisor_defined_cond(i1 noundef %b, i5 %x, i5 %y, i5 %z) {
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; CHECK-LABEL: @srem_common_divisor_defined_cond(
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; CHECK-NEXT: [[SEL_V:%.*]] = select i1 [[B:%.*]], i5 [[Z:%.*]], i5 [[Y:%.*]]
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; CHECK-NEXT: [[SEL:%.*]] = srem i5 [[SEL_V]], [[X:%.*]]
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; CHECK-NEXT: ret i5 [[SEL]]
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;
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%r1 = srem i5 %y, %x
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%r2 = srem i5 %z, %x
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%sel = select i1 %b, i5 %r2, i5 %r1
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ret i5 %sel
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}
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define i5 @udiv_common_divisor_defined_cond(i1 noundef %b, i5 %x, i5 %y, i5 %z) {
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; CHECK-LABEL: @udiv_common_divisor_defined_cond(
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; CHECK-NEXT: [[SEL_V:%.*]] = select i1 [[B:%.*]], i5 [[Z:%.*]], i5 [[Y:%.*]]
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; CHECK-NEXT: [[SEL:%.*]] = udiv i5 [[SEL_V]], [[X:%.*]]
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; CHECK-NEXT: ret i5 [[SEL]]
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;
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%r1 = udiv i5 %y, %x
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%r2 = udiv i5 %z, %x
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%sel = select i1 %b, i5 %r2, i5 %r1
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ret i5 %sel
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}
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define i5 @urem_common_divisor_defined_cond(i1 noundef %b, i5 %x, i5 %y, i5 %z) {
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; CHECK-LABEL: @urem_common_divisor_defined_cond(
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; CHECK-NEXT: [[SEL_V:%.*]] = select i1 [[B:%.*]], i5 [[Z:%.*]], i5 [[Y:%.*]]
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; CHECK-NEXT: [[SEL:%.*]] = urem i5 [[SEL_V]], [[X:%.*]]
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; CHECK-NEXT: ret i5 [[SEL]]
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;
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%r1 = urem i5 %y, %x
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%r2 = urem i5 %z, %x
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%sel = select i1 %b, i5 %r2, i5 %r1
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ret i5 %sel
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}
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define i5 @sdiv_common_dividend_defined_cond(i1 noundef %b, i5 %x, i5 %y, i5 %z) {
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; CHECK-LABEL: @sdiv_common_dividend_defined_cond(
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; CHECK-NEXT: [[SEL_V:%.*]] = select i1 [[B:%.*]], i5 [[Z:%.*]], i5 [[Y:%.*]]
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; CHECK-NEXT: [[SEL:%.*]] = sdiv i5 [[X:%.*]], [[SEL_V]]
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; CHECK-NEXT: ret i5 [[SEL]]
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;
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%r1 = sdiv i5 %x, %y
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%r2 = sdiv i5 %x, %z
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%sel = select i1 %b, i5 %r2, i5 %r1
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ret i5 %sel
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}
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define i5 @srem_common_dividend_defined_cond(i1 noundef %b, i5 %x, i5 %y, i5 %z) {
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; CHECK-LABEL: @srem_common_dividend_defined_cond(
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; CHECK-NEXT: [[SEL_V:%.*]] = select i1 [[B:%.*]], i5 [[Z:%.*]], i5 [[Y:%.*]]
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; CHECK-NEXT: [[SEL:%.*]] = srem i5 [[X:%.*]], [[SEL_V]]
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; CHECK-NEXT: ret i5 [[SEL]]
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;
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%r1 = srem i5 %x, %y
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%r2 = srem i5 %x, %z
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%sel = select i1 %b, i5 %r2, i5 %r1
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ret i5 %sel
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}
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define i5 @udiv_common_dividend_defined_cond(i1 noundef %b, i5 %x, i5 %y, i5 %z) {
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; CHECK-LABEL: @udiv_common_dividend_defined_cond(
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; CHECK-NEXT: [[SEL_V:%.*]] = select i1 [[B:%.*]], i5 [[Z:%.*]], i5 [[Y:%.*]]
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; CHECK-NEXT: [[SEL:%.*]] = udiv i5 [[X:%.*]], [[SEL_V]]
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; CHECK-NEXT: ret i5 [[SEL]]
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;
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%r1 = udiv i5 %x, %y
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%r2 = udiv i5 %x, %z
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%sel = select i1 %b, i5 %r2, i5 %r1
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ret i5 %sel
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}
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define i5 @urem_common_dividend_defined_cond(i1 noundef %b, i5 %x, i5 %y, i5 %z) {
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; CHECK-LABEL: @urem_common_dividend_defined_cond(
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; CHECK-NEXT: [[SEL_V:%.*]] = select i1 [[B:%.*]], i5 [[Z:%.*]], i5 [[Y:%.*]]
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; CHECK-NEXT: [[SEL:%.*]] = urem i5 [[X:%.*]], [[SEL_V]]
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; CHECK-NEXT: ret i5 [[SEL]]
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;
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%r1 = urem i5 %x, %y
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%r2 = urem i5 %x, %z
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%sel = select i1 %b, i5 %r2, i5 %r1
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ret i5 %sel
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}
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define i32 @rem_euclid_1(i32 %0) {
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; CHECK-LABEL: @rem_euclid_1(
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; CHECK-NEXT: [[SEL:%.*]] = and i32 [[TMP0:%.*]], 7
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; CHECK-NEXT: ret i32 [[SEL]]
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;
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%rem = srem i32 %0, 8
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%cond = icmp slt i32 %rem, 0
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%add = add i32 %rem, 8
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%sel = select i1 %cond, i32 %add, i32 %rem
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ret i32 %sel
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}
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define i32 @rem_euclid_2(i32 %0) {
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; CHECK-LABEL: @rem_euclid_2(
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; CHECK-NEXT: [[SEL:%.*]] = and i32 [[TMP0:%.*]], 7
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; CHECK-NEXT: ret i32 [[SEL]]
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;
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%rem = srem i32 %0, 8
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%cond = icmp sgt i32 %rem, -1
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%add = add i32 %rem, 8
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%sel = select i1 %cond, i32 %rem, i32 %add
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ret i32 %sel
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}
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define i32 @rem_euclid_wrong_sign_test(i32 %0) {
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; CHECK-LABEL: @rem_euclid_wrong_sign_test(
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; CHECK-NEXT: [[REM:%.*]] = srem i32 [[TMP0:%.*]], 8
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; CHECK-NEXT: [[COND:%.*]] = icmp sgt i32 [[REM]], 0
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; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[REM]], 8
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; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND]], i32 [[ADD]], i32 [[REM]]
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; CHECK-NEXT: ret i32 [[SEL]]
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;
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%rem = srem i32 %0, 8
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%cond = icmp sgt i32 %rem, 0
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%add = add i32 %rem, 8
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%sel = select i1 %cond, i32 %add, i32 %rem
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ret i32 %sel
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}
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define i32 @rem_euclid_add_different_const(i32 %0) {
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; CHECK-LABEL: @rem_euclid_add_different_const(
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; CHECK-NEXT: [[REM:%.*]] = srem i32 [[TMP0:%.*]], 8
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; CHECK-NEXT: [[COND:%.*]] = icmp slt i32 [[REM]], 0
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; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[REM]], 9
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; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND]], i32 [[ADD]], i32 [[REM]]
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; CHECK-NEXT: ret i32 [[SEL]]
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;
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%rem = srem i32 %0, 8
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%cond = icmp slt i32 %rem, 0
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%add = add i32 %rem, 9
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%sel = select i1 %cond, i32 %add, i32 %rem
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ret i32 %sel
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}
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define i32 @rem_euclid_wrong_operands_select(i32 %0) {
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; CHECK-LABEL: @rem_euclid_wrong_operands_select(
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; CHECK-NEXT: [[REM:%.*]] = srem i32 [[TMP0:%.*]], 8
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; CHECK-NEXT: [[COND:%.*]] = icmp slt i32 [[REM]], 0
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; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[REM]], 8
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; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND]], i32 [[REM]], i32 [[ADD]]
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; CHECK-NEXT: ret i32 [[SEL]]
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;
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%rem = srem i32 %0, 8
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%cond = icmp slt i32 %rem, 0
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%add = add i32 %rem, 8
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%sel = select i1 %cond, i32 %rem, i32 %add
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ret i32 %sel
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}
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define <2 x i32> @rem_euclid_vec(<2 x i32> %0) {
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; CHECK-LABEL: @rem_euclid_vec(
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; CHECK-NEXT: [[SEL:%.*]] = and <2 x i32> [[TMP0:%.*]], <i32 7, i32 7>
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; CHECK-NEXT: ret <2 x i32> [[SEL]]
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;
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%rem = srem <2 x i32> %0, <i32 8, i32 8>
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%cond = icmp slt <2 x i32> %rem, <i32 0, i32 0>
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%add = add <2 x i32> %rem, <i32 8, i32 8>
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%sel = select <2 x i1> %cond, <2 x i32> %add, <2 x i32> %rem
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ret <2 x i32> %sel
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}
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define i128 @rem_euclid_i128(i128 %0) {
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; CHECK-LABEL: @rem_euclid_i128(
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; CHECK-NEXT: [[SEL:%.*]] = and i128 [[TMP0:%.*]], 7
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; CHECK-NEXT: ret i128 [[SEL]]
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;
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%rem = srem i128 %0, 8
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%cond = icmp slt i128 %rem, 0
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%add = add i128 %rem, 8
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%sel = select i1 %cond, i128 %add, i128 %rem
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ret i128 %sel
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}
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define i8 @rem_euclid_non_const_pow2(i8 %0, i8 %1) {
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; CHECK-LABEL: @rem_euclid_non_const_pow2(
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; CHECK-NEXT: [[NOTMASK:%.*]] = shl nsw i8 -1, [[TMP0:%.*]]
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; CHECK-NEXT: [[TMP3:%.*]] = xor i8 [[NOTMASK]], -1
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; CHECK-NEXT: [[SEL:%.*]] = and i8 [[TMP1:%.*]], [[TMP3]]
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; CHECK-NEXT: ret i8 [[SEL]]
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;
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%pow2 = shl i8 1, %0
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%rem = srem i8 %1, %pow2
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%cond = icmp slt i8 %rem, 0
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%add = add i8 %rem, %pow2
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%sel = select i1 %cond, i8 %add, i8 %rem
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ret i8 %sel
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}
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define i32 @rem_euclid_pow2_true_arm_folded(i32 %n) {
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; CHECK-LABEL: @rem_euclid_pow2_true_arm_folded(
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; CHECK-NEXT: [[RES:%.*]] = and i32 [[N:%.*]], 1
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; CHECK-NEXT: ret i32 [[RES]]
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;
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%rem = srem i32 %n, 2
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%neg = icmp slt i32 %rem, 0
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%res = select i1 %neg, i32 1, i32 %rem
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ret i32 %res
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}
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define i32 @rem_euclid_pow2_false_arm_folded(i32 %n) {
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; CHECK-LABEL: @rem_euclid_pow2_false_arm_folded(
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; CHECK-NEXT: [[RES:%.*]] = and i32 [[N:%.*]], 1
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; CHECK-NEXT: ret i32 [[RES]]
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;
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%rem = srem i32 %n, 2
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%nonneg = icmp sge i32 %rem, 0
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%res = select i1 %nonneg, i32 %rem, i32 1
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ret i32 %res
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}
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define i8 @pr89516(i8 %n, i8 %x) {
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; CHECK-LABEL: @pr89516(
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; CHECK-NEXT: [[COND:%.*]] = icmp slt i8 [[X:%.*]], 0
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; CHECK-NEXT: [[POW2:%.*]] = shl nuw i8 1, [[N:%.*]]
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; CHECK-NEXT: [[SREM:%.*]] = srem i8 1, [[POW2]]
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; CHECK-NEXT: [[ADD:%.*]] = select i1 [[COND]], i8 [[POW2]], i8 0
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; CHECK-NEXT: [[RES:%.*]] = add nuw i8 [[SREM]], [[ADD]]
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; CHECK-NEXT: ret i8 [[RES]]
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;
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%cond = icmp slt i8 %x, 0
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%pow2 = shl nuw i8 1, %n
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%srem = srem i8 1, %pow2
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%add = add nuw i8 %srem, %pow2
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%res = select i1 %cond, i8 %add, i8 %srem
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ret i8 %res
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}
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