This patch splits off intrinsic hanlding to a new VPWidenIntrinsicRecipe. VPWidenIntrinsicRecipes only need access to the intrinsic ID to widen and the scalar result type (in case the intrinsic is overloaded on the result type). It does not need access to an underlying IR call instruction or function. This means VPWidenIntrinsicRecipe can be created easily without access to underlying IR.
253 lines
11 KiB
LLVM
253 lines
11 KiB
LLVM
; RUN: opt -S -passes=loop-vectorize,instcombine -force-vector-interleave=1 -mattr=+sve -mtriple aarch64-unknown-linux-gnu \
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; RUN: -prefer-predicate-over-epilogue=scalar-epilogue -pass-remarks-missed=loop-vectorize < %s 2>%t | FileCheck %s
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; RUN: cat %t | FileCheck %s --check-prefix=CHECK-REMARKS
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; RUN: opt -S -passes=loop-vectorize,instcombine -force-vector-interleave=1 -force-target-instruction-cost=1 -mattr=+sve -mtriple aarch64-unknown-linux-gnu \
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; RUN: -prefer-predicate-over-epilogue=scalar-epilogue -pass-remarks-missed=loop-vectorize < %s 2>%t | FileCheck %s
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; RUN: cat %t | FileCheck %s --check-prefix=CHECK-REMARKS
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define void @vec_load(i64 %N, ptr nocapture %a, ptr nocapture readonly %b) {
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; CHECK-LABEL: @vec_load
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; CHECK: vector.body:
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; CHECK: %[[LOAD:.*]] = load <vscale x 2 x double>, ptr
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; CHECK: call <vscale x 2 x double> @foo_vec(<vscale x 2 x double> %[[LOAD]])
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entry:
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%cmp7 = icmp sgt i64 %N, 0
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br i1 %cmp7, label %for.body, label %for.end
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for.body: ; preds = %for.body.preheader, %for.body
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
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%arrayidx = getelementptr inbounds double, ptr %b, i64 %iv
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%0 = load double, ptr %arrayidx, align 8
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%1 = call double @foo(double %0) #0
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%add = fadd double %1, 1.000000e+00
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%arrayidx2 = getelementptr inbounds double, ptr %a, i64 %iv
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store double %add, ptr %arrayidx2, align 8
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%iv.next = add nuw nsw i64 %iv, 1
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%exitcond.not = icmp eq i64 %iv.next, %N
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br i1 %exitcond.not, label %for.end, label %for.body, !llvm.loop !1
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for.end: ; preds = %for.body, %entry
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ret void
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}
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define void @vec_scalar(i64 %N, ptr nocapture %a) {
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; CHECK-LABEL: @vec_scalar
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; CHECK: vector.body:
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; CHECK: call <vscale x 2 x double> @foo_vec(<vscale x 2 x double> shufflevector (<vscale x 2 x double> insertelement (<vscale x 2 x double> poison, double 1.000000e+01, i64 0), <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer))
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entry:
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%cmp7 = icmp sgt i64 %N, 0
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br i1 %cmp7, label %for.body, label %for.end
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for.body: ; preds = %for.body.preheader, %for.body
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
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%0 = call double @foo(double 10.0) #0
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%sub = fsub double %0, 1.000000e+00
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%arrayidx = getelementptr inbounds double, ptr %a, i64 %iv
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store double %sub, ptr %arrayidx, align 8
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%iv.next = add nuw nsw i64 %iv, 1
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%exitcond.not = icmp eq i64 %iv.next, %N
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br i1 %exitcond.not, label %for.end, label %for.body, !llvm.loop !1
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for.end: ; preds = %for.body, %entry
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ret void
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}
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define void @vec_ptr(i64 %N, ptr noalias %a, ptr readnone %b) {
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; CHECK-LABEL: @vec_ptr
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; CHECK: for.body:
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; CHECK: %[[LOAD:.*]] = load ptr, ptr
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; CHECK: call i64 @bar(ptr %[[LOAD]])
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entry:
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%cmp7 = icmp sgt i64 %N, 0
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br i1 %cmp7, label %for.body, label %for.end
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for.body:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
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%gep = getelementptr ptr, ptr %b, i64 %iv
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%load = load ptr, ptr %gep
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%call = call i64 @bar(ptr %load) #1
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%arrayidx = getelementptr inbounds i64, ptr %a, i64 %iv
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store i64 %call, ptr %arrayidx
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%iv.next = add nuw nsw i64 %iv, 1
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%exitcond = icmp eq i64 %iv.next, 1024
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br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !1
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for.end:
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ret void
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}
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define void @vec_intrinsic(i64 %N, ptr nocapture readonly %a) {
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; CHECK-LABEL: @vec_intrinsic
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; CHECK: vector.body:
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; CHECK: %[[LOAD:.*]] = load <vscale x 2 x double>, ptr
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; CHECK: call fast <vscale x 2 x double> @sin_vec_nxv2f64(<vscale x 2 x double> %[[LOAD]])
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entry:
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%cmp7 = icmp sgt i64 %N, 0
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br i1 %cmp7, label %for.body, label %for.end
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for.body:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
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%arrayidx = getelementptr inbounds double, ptr %a, i64 %iv
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%0 = load double, ptr %arrayidx, align 8
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%1 = call fast double @llvm.sin.f64(double %0) #2
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%add = fadd fast double %1, 1.000000e+00
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store double %add, ptr %arrayidx, align 8
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%iv.next = add nuw nsw i64 %iv, 1
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%exitcond = icmp eq i64 %iv.next, %N
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br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !1
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for.end:
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ret void
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}
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; CHECK-REMARKS: UserVF ignored because of invalid costs.
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; CHECK-REMARKS-NEXT: t.c:3:10: Recipe with invalid costs prevented vectorization at VF=(vscale x 1): load
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; CHECK-REMARKS-NEXT: t.c:3:20: Recipe with invalid costs prevented vectorization at VF=(vscale x 1, vscale x 2): call to llvm.sin
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; CHECK-REMARKS-NEXT: t.c:3:30: Recipe with invalid costs prevented vectorization at VF=(vscale x 1): store
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define void @vec_sin_no_mapping(ptr noalias nocapture %dst, ptr noalias nocapture readonly %src, i64 %n) {
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; CHECK: @vec_sin_no_mapping
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; CHECK: call fast <2 x float> @llvm.sin.v2f32
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; CHECK-NOT: <vscale x
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entry:
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br label %for.body
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for.body: ; preds = %entry, %for.body
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%i.07 = phi i64 [ %inc, %for.body ], [ 0, %entry ]
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%arrayidx = getelementptr inbounds float, ptr %src, i64 %i.07
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%0 = load float, ptr %arrayidx, align 4, !dbg !11
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%1 = tail call fast float @llvm.sin.f32(float %0), !dbg !12
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%arrayidx1 = getelementptr inbounds float, ptr %dst, i64 %i.07
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store float %1, ptr %arrayidx1, align 4, !dbg !13
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%inc = add nuw nsw i64 %i.07, 1
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%exitcond.not = icmp eq i64 %inc, %n
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br i1 %exitcond.not, label %for.cond.cleanup, label %for.body, !llvm.loop !1
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for.cond.cleanup: ; preds = %for.body
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ret void
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}
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; CHECK-REMARKS: UserVF ignored because of invalid costs.
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; CHECK-REMARKS-NEXT: t.c:3:10: Recipe with invalid costs prevented vectorization at VF=(vscale x 1): load
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; CHECK-REMARKS-NEXT: t.c:3:30: Recipe with invalid costs prevented vectorization at VF=(vscale x 1): fadd
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; CHECK-REMARKS-NEXT: t.c:3:30: Recipe with invalid costs prevented vectorization at VF=(vscale x 1, vscale x 2): call to llvm.sin
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; CHECK-REMARKS-NEXT: t.c:3:20: Recipe with invalid costs prevented vectorization at VF=(vscale x 1, vscale x 2): call to llvm.sin
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; CHECK-REMARKS-NEXT: t.c:3:40: Recipe with invalid costs prevented vectorization at VF=(vscale x 1): store
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define void @vec_sin_no_mapping_ite(ptr noalias nocapture %dst, ptr noalias nocapture readonly %src, i64 %n) {
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; CHECK: @vec_sin_no_mapping_ite
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; CHECK-NOT: <vscale x
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; CHECK: ret
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entry:
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br label %for.body
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for.body: ; preds = %entry, %if.end
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%i.07 = phi i64 [ %inc, %if.end ], [ 0, %entry ]
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%arrayidx = getelementptr inbounds float, ptr %src, i64 %i.07
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%0 = load float, ptr %arrayidx, align 4, !dbg !11
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%cmp = fcmp ugt float %0, 0.0000
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br i1 %cmp, label %if.then, label %if.else
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if.then:
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%1 = tail call fast float @llvm.sin.f32(float %0), !dbg !12
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br label %if.end
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if.else:
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%add = fadd float %0, 12.0, !dbg !13
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%2 = tail call fast float @llvm.sin.f32(float %add), !dbg !13
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br label %if.end
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if.end:
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%3 = phi float [%1, %if.then], [%2, %if.else]
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%arrayidx1 = getelementptr inbounds float, ptr %dst, i64 %i.07
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store float %3, ptr %arrayidx1, align 4, !dbg !14
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%inc = add nuw nsw i64 %i.07, 1
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%exitcond.not = icmp eq i64 %inc, %n
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br i1 %exitcond.not, label %for.cond.cleanup, label %for.body, !llvm.loop !1
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for.cond.cleanup: ; preds = %for.body
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ret void
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}
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; CHECK-REMARKS: UserVF ignored because of invalid costs.
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; CHECK-REMARKS-NEXT: t.c:3:10: Recipe with invalid costs prevented vectorization at VF=(vscale x 1): load
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; CHECK-REMARKS-NEXT: t.c:3:20: Recipe with invalid costs prevented vectorization at VF=(vscale x 1, vscale x 2): call to llvm.sin
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; CHECK-REMARKS-NEXT: t.c:3:30: Recipe with invalid costs prevented vectorization at VF=(vscale x 1): store
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define void @vec_sin_fixed_mapping(ptr noalias nocapture %dst, ptr noalias nocapture readonly %src, i64 %n) {
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; CHECK: @vec_sin_fixed_mapping
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; CHECK: call fast <2 x float> @llvm.sin.v2f32
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; CHECK-NOT: <vscale x
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entry:
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br label %for.body
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for.body: ; preds = %entry, %for.body
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%i.07 = phi i64 [ %inc, %for.body ], [ 0, %entry ]
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%arrayidx = getelementptr inbounds float, ptr %src, i64 %i.07
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%0 = load float, ptr %arrayidx, align 4, !dbg !11
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%1 = tail call fast float @llvm.sin.f32(float %0) #3, !dbg !12
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%arrayidx1 = getelementptr inbounds float, ptr %dst, i64 %i.07
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store float %1, ptr %arrayidx1, align 4, !dbg !13
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%inc = add nuw nsw i64 %i.07, 1
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%exitcond.not = icmp eq i64 %inc, %n
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br i1 %exitcond.not, label %for.cond.cleanup, label %for.body, !llvm.loop !1
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for.cond.cleanup: ; preds = %for.body
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ret void
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}
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; Even though there are no function mappings attached to the call
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; in the loop below we can still vectorize the loop because SVE has
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; hardware support in the form of the 'fqsrt' instruction.
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define void @vec_sqrt_no_mapping(ptr noalias nocapture %dst, ptr noalias nocapture readonly %src, i64 %n) {
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; CHECK: @vec_sqrt_no_mapping
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; CHECK: call fast <vscale x 2 x float> @llvm.sqrt.nxv2f32
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entry:
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br label %for.body
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for.body: ; preds = %entry, %for.body
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%i.07 = phi i64 [ %inc, %for.body ], [ 0, %entry ]
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%arrayidx = getelementptr inbounds float, ptr %src, i64 %i.07
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%0 = load float, ptr %arrayidx, align 4
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%1 = tail call fast float @llvm.sqrt.f32(float %0)
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%arrayidx1 = getelementptr inbounds float, ptr %dst, i64 %i.07
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store float %1, ptr %arrayidx1, align 4
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%inc = add nuw nsw i64 %i.07, 1
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%exitcond.not = icmp eq i64 %inc, %n
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br i1 %exitcond.not, label %for.cond.cleanup, label %for.body, !llvm.loop !1
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for.cond.cleanup: ; preds = %for.body
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ret void
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}
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declare double @foo(double)
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declare i64 @bar(ptr)
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declare double @llvm.sin.f64(double)
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declare float @llvm.sin.f32(float)
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declare float @llvm.sqrt.f32(float)
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declare <vscale x 2 x double> @foo_vec(<vscale x 2 x double>)
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declare <vscale x 2 x i64> @bar_vec(<vscale x 2 x ptr>)
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declare <vscale x 2 x double> @sin_vec_nxv2f64(<vscale x 2 x double>)
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declare <2 x double> @sin_vec_v2f64(<2 x double>)
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attributes #0 = { "vector-function-abi-variant"="_ZGVsNxv_foo(foo_vec)" }
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attributes #1 = { "vector-function-abi-variant"="_ZGVsNxv_bar(bar_vec)" }
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attributes #2 = { "vector-function-abi-variant"="_ZGVsNxv_llvm.sin.f64(sin_vec_nxv2f64)" }
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attributes #3 = { "vector-function-abi-variant"="_ZGV_LLVM_N2v_llvm.sin.f64(sin_vec_v2f64)" }
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!1 = distinct !{!1, !2, !3}
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!2 = !{!"llvm.loop.vectorize.width", i32 2}
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!3 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
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!llvm.dbg.cu = !{!4}
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!llvm.module.flags = !{!7}
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!llvm.ident = !{!8}
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!4 = distinct !DICompileUnit(language: DW_LANG_C99, file: !5, producer: "clang", isOptimized: true, runtimeVersion: 0, emissionKind: NoDebug, enums: !6, splitDebugInlining: false, nameTableKind: None)
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!5 = !DIFile(filename: "t.c", directory: "somedir")
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!6 = !{}
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!7 = !{i32 2, !"Debug Info Version", i32 3}
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!8 = !{!"clang"}
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!9 = distinct !DISubprogram(name: "foo", scope: !5, file: !5, line: 2, type: !10, scopeLine: 2, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !4, retainedNodes: !6)
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!10 = !DISubroutineType(types: !6)
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!11 = !DILocation(line: 3, column: 10, scope: !9)
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!12 = !DILocation(line: 3, column: 20, scope: !9)
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!13 = !DILocation(line: 3, column: 30, scope: !9)
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!14 = !DILocation(line: 3, column: 40, scope: !9)
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