c8c0b18b5d
Update existing tests with dead interleave groups by adding users. This ensures the tests keep testing what they were intended to test with a planned change to skip unused instructions in cost computations.
77 lines
2.9 KiB
LLVM
77 lines
2.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
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; RUN: opt -p loop-vectorize -scalable-vectorization=on -force-vector-width=1 -force-target-supports-scalable-vectors=true -S %s | FileCheck %s
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target datalayout = "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128"
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define i64 @pr97452_scalable_vf1_for_live_out(ptr %src) {
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; CHECK-LABEL: define i64 @pr97452_scalable_vf1_for_live_out(
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; CHECK-SAME: ptr [[SRC:%.*]]) {
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; CHECK-NEXT: [[ENTRY:.*]]:
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; CHECK-NEXT: br label %[[LOOP:.*]]
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; CHECK: [[LOOP]]:
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; CHECK-NEXT: [[FOR:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[L:%.*]], %[[LOOP]] ]
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; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
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; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1
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; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i64, ptr [[SRC]], i64 [[IV]]
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; CHECK-NEXT: [[L]] = load i64, ptr [[GEP]], align 8
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; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV]], 22
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; CHECK-NEXT: br i1 [[EC]], label %[[EXIT:.*]], label %[[LOOP]]
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; CHECK: [[EXIT]]:
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; CHECK-NEXT: [[RES:%.*]] = phi i64 [ [[FOR]], %[[LOOP]] ]
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; CHECK-NEXT: ret i64 [[RES]]
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;
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entry:
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br label %loop
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loop:
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%for = phi i64 [ 0, %entry ], [ %l, %loop ]
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
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%iv.next = add i64 %iv, 1
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%gep = getelementptr inbounds i64, ptr %src, i64 %iv
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%l = load i64, ptr %gep, align 8
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%ec = icmp eq i64 %iv, 22
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br i1 %ec, label %exit, label %loop
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exit:
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%res = phi i64 [ %for, %loop ]
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ret i64 %res
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}
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define void @pr97452_scalable_vf1_for_no_live_out(ptr %src, ptr noalias %dst) {
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; CHECK-LABEL: define void @pr97452_scalable_vf1_for_no_live_out(
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; CHECK-SAME: ptr [[SRC:%.*]], ptr noalias [[DST:%.*]]) {
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; CHECK-NEXT: [[ENTRY:.*]]:
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; CHECK-NEXT: br label %[[LOOP:.*]]
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; CHECK: [[LOOP]]:
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; CHECK-NEXT: [[FOR:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[L:%.*]], %[[LOOP]] ]
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; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
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; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1
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; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i64, ptr [[SRC]], i64 [[IV]]
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; CHECK-NEXT: [[L]] = load i64, ptr [[GEP]], align 8
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; CHECK-NEXT: [[GEP_DST:%.*]] = getelementptr inbounds i64, ptr [[DST]], i64 [[IV]]
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; CHECK-NEXT: store i64 [[FOR]], ptr [[GEP_DST]], align 8
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; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV]], 22
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; CHECK-NEXT: br i1 [[EC]], label %[[EXIT:.*]], label %[[LOOP]]
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; CHECK: [[EXIT]]:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %loop
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loop:
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%for = phi i64 [ 0, %entry ], [ %l, %loop ]
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
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%iv.next = add i64 %iv, 1
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%gep = getelementptr inbounds i64, ptr %src, i64 %iv
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%l = load i64, ptr %gep, align 8
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%gep.dst = getelementptr inbounds i64, ptr %dst, i64 %iv
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store i64 %for, ptr %gep.dst
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%ec = icmp eq i64 %iv, 22
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br i1 %ec, label %exit, label %loop
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exit:
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ret void
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}
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