Yingwei Zheng 095d49da76 [InstCombine] Set samesign when converting signed predicates into unsigned (#112642) ...

Alive2: https://alive2.llvm.org/ce/z/6cqdt-

2024-10-17 20:43:48 +08:00

..

addsub-inseltpoison.ll

…

addsub.ll

…

blendv-select.ll

…

ctlz-loop.ll

…

earlycse-after-simplifycfg-two-entry-phi-node-folding.ll

…

excessive-unrolling.ll

…

hoist-load-of-baseptr.ll

…

horiz-math-inseltpoison.ll

…

horiz-math.ll

…

lit.local.cfg

…

loadcombine.ll

…

loop-idiom-vs-indvars.ll

…

loop-vectorizer-noalias.ll

…

masked-memory-ops-with-cf.ll

…

masked-memory-ops.ll

…

merge-functions2.ll

…

merge-functions3.ll

…

merge-functions.ll

…

nancvt.ll

…

peel-before-lv-to-enable-vectorization.ll

…

pixel-splat.ll

…

pr38280.ll

…

pr48844-br-to-switch-vectorization.ll

…

pr50555.ll

…

pr52078.ll

…

pr52253.ll

…

pr52289.ll

…

pr61061.ll

…

pr67803.ll

…

pr88239.ll

…

scalarization-inseltpoison.ll

…

scalarization.ll

…

shuffle-inseltpoison.ll

…

shuffle.ll

…

simplifycfg-late.ll

…

speculation-vs-tbaa.ll

…

spurious-peeling.ll

…

SROA-after-final-loop-unrolling-2.ll

…

SROA-after-final-loop-unrolling.ll

…

SROA-after-loop-unrolling.ll

…

store-constant-merge.ll

…

unroll-vectorizer.ll

…

unsigned-multiply-overflow-check.ll

…

vdiv-nounroll.ll

…

vdiv.ll

…

vec-load-combine.ll

…

vec-shift.ll

…

vector-math.ll

…

vector-reduction-known-first-value.ll

…

vector-reductions-expanded.ll

…

vector-reductions-logical.ll

…

vector-reductions.ll

…