b7e4fba6e5
After #98505, the textual IR keyword `x86_mmx` was temporarily made to parse as `<1 x i64>`, so as not to require a lot of test update noise. This completes the removal of the type, by removing the`x86_mmx` keyword from the IR parser, and making the (now no-op) test updates via `sed -i 's/\bx86_mmx\b/<1 x i64>/g' $(git grep -l x86_mmx llvm/test/)`. Resulting bitcasts from <1 x i64> to itself were then manually deleted. Changes to llvm/test/Bitcode/compatibility-$VERSION.ll were reverted, as they're intended to be equivalent to the .bc file, if parsed by old LLVM, so shouldn't be updated. A few tests were removed, as they're no longer testing anything, in the following files: - llvm/test/Transforms/GlobalOpt/x86_mmx_load.ll - llvm/test/Transforms/InstCombine/cast.ll - llvm/test/Transforms/InstSimplify/ConstProp/gep-zeroinit-vector.ll Works towards issue #98272.
47 lines
2.1 KiB
LLVM
47 lines
2.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -passes='sroa<preserve-cfg>' -S | FileCheck %s --check-prefixes=CHECK,CHECK-PRESERVE-CFG
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; RUN: opt < %s -passes='sroa<modify-cfg>' -S | FileCheck %s --check-prefixes=CHECK,CHECK-MODIFY-CFG
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%struct.Value = type { %union.anon }
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%union.anon = type { <32 x i8> }
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@A = dso_local global i64 0, align 8
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; Make sure that sroa does not crash when dealing with an invalid vector
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; element type.
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define void @foo() {
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; CHECK-LABEL: @foo(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[REF_TMP_I:%.*]] = alloca [[STRUCT_VALUE:%.*]], align 32
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; CHECK-NEXT: call void @value_create(ptr sret([[STRUCT_VALUE]]) align 32 [[REF_TMP_I]])
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; CHECK-NEXT: [[CALL_I:%.*]] = call align 32 ptr @value_set_type(ptr align 32 [[REF_TMP_I]])
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; CHECK-NEXT: [[TMP0:%.*]] = load <32 x i8>, ptr [[CALL_I]], align 32
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; CHECK-NEXT: [[REF_TMP_SROA_0_0_VEC_EXTRACT:%.*]] = shufflevector <32 x i8> [[TMP0]], <32 x i8> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
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; CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i8> [[REF_TMP_SROA_0_0_VEC_EXTRACT]] to <1 x i64>
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; CHECK-NEXT: [[TMP2:%.*]] = call <1 x i64> @llvm.x86.sse.pshuf.w(<1 x i64> [[TMP1]], i8 0)
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; CHECK-NEXT: store <1 x i64> [[TMP2]], ptr @A, align 8
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; CHECK-NEXT: ret void
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;
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entry:
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%ref.tmp.i = alloca %struct.Value, align 32
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%ref.tmp = alloca %struct.Value, align 32
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call void @value_create(ptr sret(%struct.Value) align 32 %ref.tmp.i)
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%call.i = call align 32 ptr @value_set_type(ptr align 32 %ref.tmp.i)
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%0 = load <32 x i8>, ptr %call.i, align 32
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store <32 x i8> %0, ptr %ref.tmp, align 32
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%1 = load <1 x i64>, ptr %ref.tmp, align 32
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%2 = call <1 x i64> @llvm.x86.sse.pshuf.w(<1 x i64> %1, i8 0)
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store <1 x i64> %2, ptr @A, align 8
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ret void
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}
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declare <1 x i64> @llvm.x86.sse.pshuf.w(<1 x i64>, i8 immarg)
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declare dso_local void @value_create(ptr sret(%struct.Value) align 32)
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declare dso_local align 32 ptr @value_set_type(ptr align 32)
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;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
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; CHECK-MODIFY-CFG: {{.*}}
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; CHECK-PRESERVE-CFG: {{.*}}
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