dc69265eea
Summary: SETCC isel patterns and tests for i32/64 and fp32/64 comparison Reviewers: arsenm, rengolin, craig.topper, k-ishizaka Reviewed By: arsenm Subscribers: merge_guards_bot, wdng, hiraditya, llvm-commits Tags: #ve, #llvm Differential Revision: https://reviews.llvm.org/D73171
122 lines
3.4 KiB
LLVM
122 lines
3.4 KiB
LLVM
; RUN: llc < %s -mtriple=ve-unknown-unknown | FileCheck %s
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define zeroext i1 @setcceq(i64, i64) {
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; CHECK-LABEL: setcceq:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: cmps.l %s1, %s0, %s1
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; CHECK-NEXT: or %s0, 0, (0)1
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; CHECK-NEXT: cmov.l.eq %s0, (63)0, %s1
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; CHECK-NEXT: # kill: def $sw0 killed $sw0 killed $sx0
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; CHECK-NEXT: or %s11, 0, %s9
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%3 = icmp eq i64 %0, %1
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ret i1 %3
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}
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define zeroext i1 @setccne(i64, i64) {
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; CHECK-LABEL: setccne:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: cmps.l %s1, %s0, %s1
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; CHECK-NEXT: or %s0, 0, (0)1
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; CHECK-NEXT: cmov.l.ne %s0, (63)0, %s1
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; CHECK-NEXT: # kill: def $sw0 killed $sw0 killed $sx0
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; CHECK-NEXT: or %s11, 0, %s9
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%3 = icmp ne i64 %0, %1
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ret i1 %3
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}
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define zeroext i1 @setccugt(i64, i64) {
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; CHECK-LABEL: setccugt:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: cmpu.l %s1, %s0, %s1
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; CHECK-NEXT: or %s0, 0, (0)1
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; CHECK-NEXT: cmov.l.gt %s0, (63)0, %s1
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; CHECK-NEXT: # kill: def $sw0 killed $sw0 killed $sx0
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; CHECK-NEXT: or %s11, 0, %s9
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%3 = icmp ugt i64 %0, %1
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ret i1 %3
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}
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define zeroext i1 @setccuge(i64, i64) {
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; CHECK-LABEL: setccuge:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: cmpu.l %s1, %s0, %s1
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; CHECK-NEXT: or %s0, 0, (0)1
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; CHECK-NEXT: cmov.l.ge %s0, (63)0, %s1
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; CHECK-NEXT: # kill: def $sw0 killed $sw0 killed $sx0
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; CHECK-NEXT: or %s11, 0, %s9
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%3 = icmp uge i64 %0, %1
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ret i1 %3
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}
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define zeroext i1 @setccult(i64, i64) {
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; CHECK-LABEL: setccult:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: cmpu.l %s1, %s0, %s1
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; CHECK-NEXT: or %s0, 0, (0)1
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; CHECK-NEXT: cmov.l.lt %s0, (63)0, %s1
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; CHECK-NEXT: # kill: def $sw0 killed $sw0 killed $sx0
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; CHECK-NEXT: or %s11, 0, %s9
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%3 = icmp ult i64 %0, %1
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ret i1 %3
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}
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define zeroext i1 @setccule(i64, i64) {
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; CHECK-LABEL: setccule:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: cmpu.l %s1, %s0, %s1
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; CHECK-NEXT: or %s0, 0, (0)1
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; CHECK-NEXT: cmov.l.le %s0, (63)0, %s1
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; CHECK-NEXT: # kill: def $sw0 killed $sw0 killed $sx0
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; CHECK-NEXT: or %s11, 0, %s9
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%3 = icmp ule i64 %0, %1
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ret i1 %3
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}
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define zeroext i1 @setccsgt(i64, i64) {
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; CHECK-LABEL: setccsgt:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: cmps.l %s1, %s0, %s1
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; CHECK-NEXT: or %s0, 0, (0)1
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; CHECK-NEXT: cmov.l.gt %s0, (63)0, %s1
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; CHECK-NEXT: # kill: def $sw0 killed $sw0 killed $sx0
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; CHECK-NEXT: or %s11, 0, %s9
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%3 = icmp sgt i64 %0, %1
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ret i1 %3
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}
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define zeroext i1 @setccsge(i64, i64) {
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; CHECK-LABEL: setccsge:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: cmps.l %s1, %s0, %s1
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; CHECK-NEXT: or %s0, 0, (0)1
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; CHECK-NEXT: cmov.l.ge %s0, (63)0, %s1
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; CHECK-NEXT: # kill: def $sw0 killed $sw0 killed $sx0
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; CHECK-NEXT: or %s11, 0, %s9
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%3 = icmp sge i64 %0, %1
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ret i1 %3
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}
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define zeroext i1 @setccslt(i64, i64) {
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; CHECK-LABEL: setccslt:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: cmps.l %s1, %s0, %s1
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; CHECK-NEXT: or %s0, 0, (0)1
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; CHECK-NEXT: cmov.l.lt %s0, (63)0, %s1
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; CHECK-NEXT: # kill: def $sw0 killed $sw0 killed $sx0
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; CHECK-NEXT: or %s11, 0, %s9
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%3 = icmp slt i64 %0, %1
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ret i1 %3
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}
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define zeroext i1 @setccsle(i64, i64) {
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; CHECK-LABEL: setccsle:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: cmps.l %s1, %s0, %s1
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; CHECK-NEXT: or %s0, 0, (0)1
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; CHECK-NEXT: cmov.l.le %s0, (63)0, %s1
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; CHECK-NEXT: # kill: def $sw0 killed $sw0 killed $sx0
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; CHECK-NEXT: or %s11, 0, %s9
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%3 = icmp sle i64 %0, %1
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ret i1 %3
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}
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