66251f7e1d
Record internal state based on register units. This is often more efficient as there are typically fewer register units to update compared to iterating over all the aliases of a register. Original patch by Matthias Braun, but I've been rebasing and fixing it for almost 2 years and fixed a few bugs causing intermediate failures to make this patch independent of the changes in https://reviews.llvm.org/D52010.
45 lines
1.8 KiB
LLVM
45 lines
1.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=avx -O0 | FileCheck %s
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; We should not be emitting a sign extend using a %ymm register.
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define void @test55() {
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; CHECK-LABEL: test55:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pushq %rbp
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: .cfi_offset %rbp, -16
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; CHECK-NEXT: movq %rsp, %rbp
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; CHECK-NEXT: .cfi_def_cfa_register %rbp
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; CHECK-NEXT: andq $-32, %rsp
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; CHECK-NEXT: subq $96, %rsp
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; CHECK-NEXT: vmovdqa {{.*#+}} xmm0 = [26680,34632,63774,2423,35015,60307,6240,1951]
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; CHECK-NEXT: vmovdqa %xmm0, {{[0-9]+}}(%rsp)
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; CHECK-NEXT: vmovdqa {{[0-9]+}}(%rsp), %xmm0
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; CHECK-NEXT: vmovdqa %xmm0, {{[0-9]+}}(%rsp)
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; CHECK-NEXT: vmovdqa {{[0-9]+}}(%rsp), %xmm0
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; CHECK-NEXT: vpmovsxwd %xmm0, %xmm1
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; CHECK-NEXT: # implicit-def: $ymm2
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; CHECK-NEXT: vmovaps %xmm1, %xmm2
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; CHECK-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
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; CHECK-NEXT: vpmovsxwd %xmm0, %xmm0
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; CHECK-NEXT: vinsertf128 $1, %xmm0, %ymm2, %ymm0
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; CHECK-NEXT: vmovdqa %ymm0, (%rsp)
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; CHECK-NEXT: movq %rbp, %rsp
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; CHECK-NEXT: popq %rbp
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; CHECK-NEXT: .cfi_def_cfa %rsp, 8
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; CHECK-NEXT: vzeroupper
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; CHECK-NEXT: retq
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entry:
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%id11762 = alloca <8 x i16>, align 16
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%.compoundliteral = alloca <8 x i16>, align 16
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%id11761 = alloca <8 x i32>, align 32
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store <8 x i16> <i16 26680, i16 -30904, i16 -1762, i16 2423, i16 -30521, i16 -5229, i16 6240, i16 1951>, <8 x i16>* %.compoundliteral, align 16
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%0 = load <8 x i16>, <8 x i16>* %.compoundliteral, align 16
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store <8 x i16> %0, <8 x i16>* %id11762, align 16
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%1 = load <8 x i16>, <8 x i16>* %id11762, align 16
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%conv = sext <8 x i16> %1 to <8 x i32>
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store <8 x i32> %conv, <8 x i32>* %id11761, align 32
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ret void
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}
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