George Mitenkov 7a4e39b326 [MLIR][SPIRVToLLVM] Implementation of spv.BitFieldSExtract and spv.BitFieldUExtract patterns ...

This patch adds conversion patterns for `spv.BitFieldSExtract` and `spv.BitFieldUExtract`.
As in the patch for `spv.BitFieldInsert`, `offset` and `count` have to be broadcasted in
vector case and casted to match the type of the base.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D82640

2020-07-08 12:37:37 +03:00

..

arithmetic-ops-to-llvm.mlir

[MLIR][SPIRVToLLVM] Miscellaneous ops conversion: select, fmul and undef

2020-07-08 11:06:04 +03:00

bitwise-ops-to-llvm.mlir

[MLIR][SPIRVToLLVM] Implementation of spv.BitFieldSExtract and spv.BitFieldUExtract patterns

2020-07-08 12:37:37 +03:00

cast-ops-to-llvm.mlir

[MLIR][SPIRVToLLVM] Added Bitcast conversion pattern

2020-06-29 20:32:48 -04:00

comparison-ops-to-llvm.mlir

[MLIR][SPIRVToLLVM] Added conversion for SPIR-V comparison ops

2020-06-11 18:46:17 -04:00

constant-op-to-llvm.mlir

[MLIR][SPIRVToLLVM] Convert spv.constant scalars and vectors

2020-07-02 14:26:58 -04:00

func-to-llvm.mlir

[MLIR][SPIRVToLLVM] SPIR-V function call conversion pattern

2020-07-02 12:38:27 -04:00

logical-to-llvm.mlir

[MLIR][SPIRVToLLVM] Convert bitwise and logical not

2020-06-29 19:16:50 -04:00

misc-ops-to-llvm.mlir

[MLIR][SPIRVToLLVM] Miscellaneous ops conversion: select, fmul and undef

2020-07-08 11:06:04 +03:00

module-ops-to-llvm.mlir

[MLIR][SPIRVToLLVM] Implementation of SPIR-V module conversion pattern

2020-06-24 20:42:50 -04:00

shifts-to-llvm.mlir

[MLIR][SPIRVToLLVM] Implemented shift conversion pattern

2020-06-12 19:04:30 -04:00