Simon Pilgrim a8ff77bb34 [AMDGPU] Regenerate i64 shift tests. ...

To show codegen diff due to a future SimplifyDemandedBits patch.

llvm-svn: 350065

2018-12-26 12:09:10 +00:00

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AArch64

NFC][CodeGen][X86][AArch64] Tests for bit extract (pat. a/c/d) with trunc (PR36419)

2018-12-22 10:38:05 +00:00

AMDGPU

[AMDGPU] Regenerate i64 shift tests.

2018-12-26 12:09:10 +00:00

ARC

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ARM

[ARM] Set Defs = [CPSR] for COPY_STRUCT_BYVAL, as it clobbers CPSR.

2018-12-21 18:07:10 +00:00

AVR

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BPF

[BPF] Generate BTF DebugInfo under BPF target

2018-12-19 16:40:25 +00:00

Generic

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Hexagon

[DAGCombiner] allow narrowing of add followed by truncate

2018-12-22 17:10:31 +00:00

Inputs

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Lanai

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Mips

[MIPS GlobalISel] Select G_SELECT

2018-12-25 14:42:30 +00:00

MIR

[Dwarf/AArch64] Return address signing B key dwarf support

2018-12-21 10:45:08 +00:00

MSP430

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Nios2

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NVPTX

[NVPTX] Lower instructions that expand into libcalls.

2018-12-14 23:53:06 +00:00

PowerPC

[PowerPC] Fix the bug of ISD::ADDE to set its second return type to glue

2018-12-25 03:29:51 +00:00

RISCV

[RISCV] Add support for the various RISC-V FMA instruction variants

2018-12-13 10:49:05 +00:00

SPARC

[Sparc] Use float register for integer constrained with "f" in inline asm

2018-12-13 15:13:29 +00:00

SystemZ

[SystemZ] Make better use of VLLEZ

2018-12-20 13:05:03 +00:00

Thumb

[ARM] Complete the Thumb1 shift+and->shift+shift transforms.

2018-12-20 23:39:54 +00:00

Thumb2

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WebAssembly

[WebAssembly] Fix invalid machine instrs in -O0, verify in tests

2018-12-21 06:58:15 +00:00

WinCFGuard

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WinEH

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X86

[X86] Use GetDemandedBits to simplify the operands of PMULDQ/PMULUDQ.

2018-12-24 19:40:20 +00:00

XCore

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