2946cd7010
to reflect the new license. We understand that people may be surprised that we're moving the header entirely to discuss the new license. We checked this carefully with the Foundation's lawyer and we believe this is the correct approach. Essentially, all code in the project is now made available by the LLVM project under our new license, so you will see that the license headers include that license only. Some of our contributors have contributed code under our old license, and accordingly, we have retained a copy of our old license notice in the top-level files in each project and repository. llvm-svn: 351636
275 lines
9.1 KiB
C++
275 lines
9.1 KiB
C++
//===-- DNBArchImpl.h -------------------------------------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// Created by Greg Clayton on 6/25/07.
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//
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//===----------------------------------------------------------------------===//
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#ifndef __DebugNubArchMachARM_h__
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#define __DebugNubArchMachARM_h__
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#if defined(__arm__) || defined(__arm64__) || defined(__aarch64__)
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#include "DNBArch.h"
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#include <map>
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class MachThread;
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class DNBArchMachARM : public DNBArchProtocol {
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public:
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enum { kMaxNumThumbITBreakpoints = 4 };
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DNBArchMachARM(MachThread *thread)
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: m_thread(thread), m_state(), m_disabled_watchpoints(),
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m_hw_single_chained_step_addr(INVALID_NUB_ADDRESS),
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m_last_decode_pc(INVALID_NUB_ADDRESS), m_watchpoint_hw_index(-1),
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m_watchpoint_did_occur(false),
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m_watchpoint_resume_single_step_enabled(false),
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m_saved_register_states() {
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m_disabled_watchpoints.resize(16);
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memset(&m_dbg_save, 0, sizeof(m_dbg_save));
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#if defined(USE_ARM_DISASSEMBLER_FRAMEWORK)
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ThumbStaticsInit(&m_last_decode_thumb);
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#endif
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}
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virtual ~DNBArchMachARM() {}
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static void Initialize();
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static const DNBRegisterSetInfo *GetRegisterSetInfo(nub_size_t *num_reg_sets);
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virtual bool GetRegisterValue(uint32_t set, uint32_t reg,
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DNBRegisterValue *value);
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virtual bool SetRegisterValue(uint32_t set, uint32_t reg,
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const DNBRegisterValue *value);
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virtual nub_size_t GetRegisterContext(void *buf, nub_size_t buf_len);
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virtual nub_size_t SetRegisterContext(const void *buf, nub_size_t buf_len);
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virtual uint32_t SaveRegisterState();
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virtual bool RestoreRegisterState(uint32_t save_id);
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virtual kern_return_t GetRegisterState(int set, bool force);
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virtual kern_return_t SetRegisterState(int set);
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virtual bool RegisterSetStateIsValid(int set) const;
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virtual uint64_t GetPC(uint64_t failValue); // Get program counter
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virtual kern_return_t SetPC(uint64_t value);
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virtual uint64_t GetSP(uint64_t failValue); // Get stack pointer
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virtual void ThreadWillResume();
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virtual bool ThreadDidStop();
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virtual bool NotifyException(MachException::Data &exc);
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static DNBArchProtocol *Create(MachThread *thread);
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static const uint8_t *SoftwareBreakpointOpcode(nub_size_t byte_size);
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static uint32_t GetCPUType();
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virtual uint32_t NumSupportedHardwareBreakpoints();
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virtual uint32_t NumSupportedHardwareWatchpoints();
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virtual uint32_t EnableHardwareBreakpoint(nub_addr_t addr, nub_size_t size);
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virtual bool DisableHardwareBreakpoint(uint32_t hw_break_index);
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virtual uint32_t EnableHardwareWatchpoint(nub_addr_t addr, nub_size_t size,
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bool read, bool write,
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bool also_set_on_task);
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virtual bool DisableHardwareWatchpoint(uint32_t hw_break_index,
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bool also_set_on_task);
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virtual bool DisableHardwareWatchpoint_helper(uint32_t hw_break_index,
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bool also_set_on_task);
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virtual bool ReenableHardwareWatchpoint(uint32_t hw_break_index);
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virtual bool ReenableHardwareWatchpoint_helper(uint32_t hw_break_index);
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virtual bool StepNotComplete();
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virtual uint32_t GetHardwareWatchpointHit(nub_addr_t &addr);
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#if defined(ARM_DEBUG_STATE32) && (defined(__arm64__) || defined(__aarch64__))
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typedef arm_debug_state32_t DBG;
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#else
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typedef arm_debug_state_t DBG;
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#endif
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protected:
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kern_return_t EnableHardwareSingleStep(bool enable);
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kern_return_t SetSingleStepSoftwareBreakpoints();
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bool ConditionPassed(uint8_t condition, uint32_t cpsr);
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#if defined(USE_ARM_DISASSEMBLER_FRAMEWORK)
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bool ComputeNextPC(nub_addr_t currentPC,
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arm_decoded_instruction_t decodedInstruction,
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bool currentPCIsThumb, nub_addr_t *targetPC);
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arm_error_t DecodeInstructionUsingDisassembler(
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nub_addr_t curr_pc, uint32_t curr_cpsr,
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arm_decoded_instruction_t *decodedInstruction,
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thumb_static_data_t *thumbStaticData, nub_addr_t *next_pc);
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void DecodeITBlockInstructions(nub_addr_t curr_pc);
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#endif
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void EvaluateNextInstructionForSoftwareBreakpointSetup(nub_addr_t currentPC,
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uint32_t cpsr,
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bool currentPCIsThumb,
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nub_addr_t *nextPC,
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bool *nextPCIsThumb);
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typedef enum RegisterSetTag {
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e_regSetALL = REGISTER_SET_ALL,
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e_regSetGPR, // ARM_THREAD_STATE
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e_regSetVFP, // ARM_VFP_STATE (ARM_NEON_STATE if defined __arm64__)
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e_regSetEXC, // ARM_EXCEPTION_STATE
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e_regSetDBG, // ARM_DEBUG_STATE (ARM_DEBUG_STATE32 if defined __arm64__)
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kNumRegisterSets
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} RegisterSet;
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enum { Read = 0, Write = 1, kNumErrors = 2 };
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typedef arm_thread_state_t GPR;
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#if defined(__arm64__) || defined(__aarch64__)
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typedef arm_neon_state_t FPU;
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#else
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typedef arm_vfp_state_t FPU;
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#endif
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typedef arm_exception_state_t EXC;
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static const DNBRegisterInfo g_gpr_registers[];
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static const DNBRegisterInfo g_vfp_registers[];
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static const DNBRegisterInfo g_exc_registers[];
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static const DNBRegisterSetInfo g_reg_sets[];
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static const size_t k_num_gpr_registers;
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static const size_t k_num_vfp_registers;
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static const size_t k_num_exc_registers;
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static const size_t k_num_all_registers;
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static const size_t k_num_register_sets;
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struct Context {
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GPR gpr;
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FPU vfp;
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EXC exc;
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};
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struct State {
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Context context;
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DBG dbg;
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kern_return_t gpr_errs[2]; // Read/Write errors
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kern_return_t vfp_errs[2]; // Read/Write errors
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kern_return_t exc_errs[2]; // Read/Write errors
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kern_return_t dbg_errs[2]; // Read/Write errors
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State() {
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uint32_t i;
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for (i = 0; i < kNumErrors; i++) {
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gpr_errs[i] = -1;
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vfp_errs[i] = -1;
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exc_errs[i] = -1;
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dbg_errs[i] = -1;
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}
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}
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void InvalidateRegisterSetState(int set) { SetError(set, Read, -1); }
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kern_return_t GetError(int set, uint32_t err_idx) const {
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if (err_idx < kNumErrors) {
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switch (set) {
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// When getting all errors, just OR all values together to see if
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// we got any kind of error.
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case e_regSetALL:
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return gpr_errs[err_idx] | vfp_errs[err_idx] | exc_errs[err_idx] |
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dbg_errs[err_idx];
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case e_regSetGPR:
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return gpr_errs[err_idx];
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case e_regSetVFP:
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return vfp_errs[err_idx];
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case e_regSetEXC:
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return exc_errs[err_idx];
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case e_regSetDBG:
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return dbg_errs[err_idx];
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default:
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break;
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}
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}
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return -1;
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}
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bool SetError(int set, uint32_t err_idx, kern_return_t err) {
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if (err_idx < kNumErrors) {
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switch (set) {
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case e_regSetALL:
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gpr_errs[err_idx] = err;
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vfp_errs[err_idx] = err;
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dbg_errs[err_idx] = err;
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exc_errs[err_idx] = err;
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return true;
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case e_regSetGPR:
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gpr_errs[err_idx] = err;
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return true;
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case e_regSetVFP:
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vfp_errs[err_idx] = err;
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return true;
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case e_regSetEXC:
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exc_errs[err_idx] = err;
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return true;
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case e_regSetDBG:
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dbg_errs[err_idx] = err;
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return true;
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default:
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break;
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}
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}
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return false;
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}
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bool RegsAreValid(int set) const {
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return GetError(set, Read) == KERN_SUCCESS;
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}
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};
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kern_return_t GetGPRState(bool force);
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kern_return_t GetVFPState(bool force);
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kern_return_t GetEXCState(bool force);
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kern_return_t GetDBGState(bool force);
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kern_return_t SetGPRState();
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kern_return_t SetVFPState();
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kern_return_t SetEXCState();
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kern_return_t SetDBGState(bool also_set_on_task);
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bool IsWatchpointEnabled(const DBG &debug_state, uint32_t hw_index);
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nub_addr_t GetWatchpointAddressByIndex(uint32_t hw_index);
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nub_addr_t GetWatchAddress(const DBG &debug_state, uint32_t hw_index);
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class disabled_watchpoint {
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public:
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disabled_watchpoint() {
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addr = 0;
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control = 0;
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}
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nub_addr_t addr;
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uint32_t control;
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};
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protected:
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MachThread *m_thread;
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State m_state;
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DBG m_dbg_save;
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// armv8 doesn't keep the disabled watchpoint values in the debug register
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// context like armv7;
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// we need to save them aside when we disable them temporarily.
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std::vector<disabled_watchpoint> m_disabled_watchpoints;
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nub_addr_t m_hw_single_chained_step_addr;
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nub_addr_t m_last_decode_pc;
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// The following member variables should be updated atomically.
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int32_t m_watchpoint_hw_index;
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bool m_watchpoint_did_occur;
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bool m_watchpoint_resume_single_step_enabled;
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typedef std::map<uint32_t, Context> SaveRegisterStates;
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SaveRegisterStates m_saved_register_states;
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};
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#endif // #if defined (__arm__)
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#endif // #ifndef __DebugNubArchMachARM_h__
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