7d7d41debc
The lowering was missing live-ins in certain cases, like a sequence of multiple tMOVCCr_pseudo instructions. This would lead to a verifier failure, and on pre-v6 Thumb CPSR would be incorrectly clobbered. For reasons I don't completely understand, it's hard to get a sequence of multiple tMOVCCr_pseudo instructions; the issue only seems to show up with 64-bit comparisons where the result is zero-extended. I added some extra testcases in case that changes in the future. Probably some optimization opportunities here if anyone is interested. (@test_slt_not is the case that was getting miscompiled.) The code to check the liveness of CPSR was stolen from X86ISelLowering.cpp; maybe it could be refactored into common helper, but I have no idea where to put it. Differential Revision: https://reviews.llvm.org/D54192 llvm-svn: 346355
104 lines
2.2 KiB
LLVM
104 lines
2.2 KiB
LLVM
; RUN: llc < %s -mtriple=thumb-apple-darwin -verify-machineinstrs | FileCheck %s
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; RUN: llc < %s -mtriple=thumb-pc-linux-gnueabi -verify-machineinstrs | FileCheck -check-prefix=CHECK-EABI %s
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define i32 @f1(i32 %a.s) {
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entry:
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%tmp = icmp eq i32 %a.s, 4
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%tmp1.s = select i1 %tmp, i32 2, i32 3
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ret i32 %tmp1.s
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}
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; CHECK-LABEL: f1:
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; CHECK: beq
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; CHECK-EABI-LABEL: f1:
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; CHECK-EABI: beq
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define i32 @f2(i32 %a.s) {
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entry:
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%tmp = icmp sgt i32 %a.s, 4
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%tmp1.s = select i1 %tmp, i32 2, i32 3
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ret i32 %tmp1.s
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}
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; CHECK-LABEL: f2:
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; CHECK: bgt
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; CHECK-EABI-LABEL: f2:
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; CHECK-EABI: bgt
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define i32 @f3(i32 %a.s, i32 %b.s) {
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entry:
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%tmp = icmp slt i32 %a.s, %b.s
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%tmp1.s = select i1 %tmp, i32 2, i32 3
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ret i32 %tmp1.s
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}
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; CHECK-LABEL: f3:
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; CHECK: blt
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; CHECK-EABI-LABEL: f3:
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; CHECK-EABI: blt
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define i32 @f4(i32 %a.s, i32 %b.s) {
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entry:
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%tmp = icmp sle i32 %a.s, %b.s
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%tmp1.s = select i1 %tmp, i32 2, i32 3
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ret i32 %tmp1.s
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}
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; CHECK-LABEL: f4:
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; CHECK: ble
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; CHECK-EABI-LABEL: f4:
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; CHECK-EABI: ble
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define i32 @f5(i32 %a.u, i32 %b.u) {
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entry:
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%tmp = icmp ule i32 %a.u, %b.u
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%tmp1.s = select i1 %tmp, i32 2, i32 3
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ret i32 %tmp1.s
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}
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; CHECK-LABEL: f5:
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; CHECK: bls
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; CHECK-EABI-LABEL: f5:
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; CHECK-EABI: bls
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define i32 @f6(i32 %a.u, i32 %b.u) {
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entry:
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%tmp = icmp ugt i32 %a.u, %b.u
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%tmp1.s = select i1 %tmp, i32 2, i32 3
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ret i32 %tmp1.s
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}
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; CHECK-LABEL: f6:
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; CHECK: bhi
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; CHECK-EABI-LABEL: f6:
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; CHECK-EABI: bhi
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define double @f7(double %a, double %b) {
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%tmp = fcmp olt double %a, 1.234e+00
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%tmp1 = select i1 %tmp, double -1.000e+00, double %b
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ret double %tmp1
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}
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; CHECK-LABEL: f7:
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; CHECK: {{blt|bge}}
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; CHECK: {{blt|bge}}
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; CHECK: __ltdf2
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; CHECK-EABI-LABEL: f7:
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; CHECK-EABI: __aeabi_dcmplt
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; CHECK-EABI: {{bne|beq}}
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; CHECK-EABI: {{bne|beq}}
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define {i32, i32} @f8(i32 %a, i32 %b, i32 %c, i32 %d) {
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entry:
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%cmp = icmp slt i32 %a, %b
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%r1 = select i1 %cmp, i32 %c, i32 %a
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%r2 = select i1 %cmp, i32 %d, i32 %b
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%z = insertvalue { i32, i32 } undef, i32 %r1, 0
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%z2 = insertvalue { i32, i32 } %z, i32 %r2, 1
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ret { i32, i32 } %z2
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}
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; CHECK-LABEL: f8:
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; CHECK: cmp r0, r1
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; CHECK: blt
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; CHECK: movs
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; CHECK: cmp r0, r1
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; CHECK: blt
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; CHECK: movs
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; CHECK: movs
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; CHECK: movs
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; CHECK: bx lr
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