3db93ac5d6
Add support for min/max flavor selects in computeConstantRange(), which allows us to fold comparisons of a min/max against a constant in InstSimplify. This fixes an infinite InstCombine loop, with the test case taken from D59378. Relative to the previous iteration, this contains some adjustments for AMDGPU med3 tests: The AMDGPU target runs InstSimplify prior to codegen, which ends up constant folding some existing med3 tests after this change. To preserve these tests a hidden -amdgpu-scalar-ir-passes option is added, which allows disabling scalar IR passes (that use InstSimplify) for testing purposes. Differential Revision: https://reviews.llvm.org/D59506 llvm-svn: 357870
139 lines
3.4 KiB
LLVM
139 lines
3.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instsimplify -S | FileCheck %s
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define i1 @test_umax1(i32 %n) {
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; CHECK-LABEL: @test_umax1(
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; CHECK-NEXT: ret i1 true
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;
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%c1 = icmp ugt i32 %n, 10
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%s = select i1 %c1, i32 %n, i32 10
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%c2 = icmp ugt i32 %s, 9
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ret i1 %c2
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}
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define i1 @test_umax2(i32 %n) {
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; CHECK-LABEL: @test_umax2(
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; CHECK-NEXT: [[C1:%.*]] = icmp ugt i32 [[N:%.*]], 10
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; CHECK-NEXT: ret i1 [[C1]]
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;
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%c1 = icmp ugt i32 %n, 10
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%s = select i1 %c1, i32 %n, i32 10
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%c2 = icmp ugt i32 %s, 10
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ret i1 %c2
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}
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define i1 @test_umax3(i32 %n) {
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; CHECK-LABEL: @test_umax3(
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; CHECK-NEXT: [[C1:%.*]] = icmp ugt i32 [[N:%.*]], 10
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; CHECK-NEXT: [[S:%.*]] = select i1 [[C1]], i32 [[N]], i32 10
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; CHECK-NEXT: [[C2:%.*]] = icmp ugt i32 [[S]], 11
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; CHECK-NEXT: ret i1 [[C2]]
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;
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%c1 = icmp ugt i32 %n, 10
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%s = select i1 %c1, i32 %n, i32 10
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%c2 = icmp ugt i32 %s, 11
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ret i1 %c2
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}
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define i1 @test_umin1(i32 %n) {
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; CHECK-LABEL: @test_umin1(
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; CHECK-NEXT: ret i1 true
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;
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%c1 = icmp ult i32 %n, 10
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%s = select i1 %c1, i32 %n, i32 10
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%c2 = icmp ult i32 %s, 11
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ret i1 %c2
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}
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define i1 @test_umin2(i32 %n) {
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; CHECK-LABEL: @test_umin2(
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; CHECK-NEXT: [[C1:%.*]] = icmp ult i32 [[N:%.*]], 10
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; CHECK-NEXT: ret i1 [[C1]]
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;
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%c1 = icmp ult i32 %n, 10
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%s = select i1 %c1, i32 %n, i32 10
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%c2 = icmp ult i32 %s, 10
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ret i1 %c2
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}
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define i1 @test_umin3(i32 %n) {
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; CHECK-LABEL: @test_umin3(
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; CHECK-NEXT: [[C1:%.*]] = icmp ult i32 [[N:%.*]], 10
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; CHECK-NEXT: [[S:%.*]] = select i1 [[C1]], i32 [[N]], i32 10
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; CHECK-NEXT: [[C2:%.*]] = icmp ult i32 [[S]], 9
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; CHECK-NEXT: ret i1 [[C2]]
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;
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%c1 = icmp ult i32 %n, 10
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%s = select i1 %c1, i32 %n, i32 10
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%c2 = icmp ult i32 %s, 9
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ret i1 %c2
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}
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define i1 @test_smax1(i32 %n) {
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; CHECK-LABEL: @test_smax1(
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; CHECK-NEXT: ret i1 true
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;
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%c1 = icmp sgt i32 %n, -10
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%s = select i1 %c1, i32 %n, i32 -10
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%c2 = icmp sgt i32 %s, -11
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ret i1 %c2
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}
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define i1 @test_smax2(i32 %n) {
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; CHECK-LABEL: @test_smax2(
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; CHECK-NEXT: [[C1:%.*]] = icmp sgt i32 [[N:%.*]], -10
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; CHECK-NEXT: ret i1 [[C1]]
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;
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%c1 = icmp sgt i32 %n, -10
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%s = select i1 %c1, i32 %n, i32 -10
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%c2 = icmp sgt i32 %s, -10
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ret i1 %c2
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}
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define i1 @test_smax3(i32 %n) {
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; CHECK-LABEL: @test_smax3(
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; CHECK-NEXT: [[C1:%.*]] = icmp sgt i32 [[N:%.*]], -10
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; CHECK-NEXT: [[S:%.*]] = select i1 [[C1]], i32 [[N]], i32 -10
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; CHECK-NEXT: [[C2:%.*]] = icmp sgt i32 [[S]], -9
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; CHECK-NEXT: ret i1 [[C2]]
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;
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%c1 = icmp sgt i32 %n, -10
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%s = select i1 %c1, i32 %n, i32 -10
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%c2 = icmp sgt i32 %s, -9
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ret i1 %c2
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}
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define i1 @test_smin1(i32 %n) {
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; CHECK-LABEL: @test_smin1(
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; CHECK-NEXT: ret i1 true
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;
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%c1 = icmp slt i32 %n, 10
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%s = select i1 %c1, i32 %n, i32 10
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%c2 = icmp slt i32 %s, 11
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ret i1 %c2
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}
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define i1 @test_smin2(i32 %n) {
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; CHECK-LABEL: @test_smin2(
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; CHECK-NEXT: [[C1:%.*]] = icmp slt i32 [[N:%.*]], 10
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; CHECK-NEXT: ret i1 [[C1]]
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;
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%c1 = icmp slt i32 %n, 10
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%s = select i1 %c1, i32 %n, i32 10
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%c2 = icmp slt i32 %s, 10
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ret i1 %c2
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}
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define i1 @test_smin3(i32 %n) {
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; CHECK-LABEL: @test_smin3(
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; CHECK-NEXT: [[C1:%.*]] = icmp slt i32 [[N:%.*]], 10
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; CHECK-NEXT: [[S:%.*]] = select i1 [[C1]], i32 [[N]], i32 10
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; CHECK-NEXT: [[C2:%.*]] = icmp slt i32 [[S]], 9
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; CHECK-NEXT: ret i1 [[C2]]
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;
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%c1 = icmp slt i32 %n, 10
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%s = select i1 %c1, i32 %n, i32 10
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%c2 = icmp slt i32 %s, 9
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ret i1 %c2
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}
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