1f067c94dc
This commit is a combination of two patches: * "Fix in getScalarizationOverhead()" If target returns false in TTI.prefersVectorizedAddressing(), it means the address registers will not need to be extracted. Therefore, there should be no operands scalarization overhead for a load instruction. * "Don't pass the instruction pointer from getMemInstScalarizationCost." Since VF is always > 1, this is a cost query for an instruction in the vectorized loop and it should not be evaluated within the scalar context of the instruction. Review: Ulrich Weigand, Hal Finkel https://reviews.llvm.org/D52351 https://reviews.llvm.org/D52417 llvm-svn: 345603
28 lines
940 B
LLVM
28 lines
940 B
LLVM
; RUN: opt -mtriple=s390x-unknown-linux -mcpu=z13 -loop-vectorize \
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; RUN: -force-vector-width=2 -debug-only=loop-vectorize \
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; RUN: -disable-output < %s 2>&1 | FileCheck %s
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; REQUIRES: asserts
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;
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; Check that a scalarized load does not get operands scalarization costs added.
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define void @fun(i64* %data, i64 %n, i64 %s, double* %Src) {
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entry:
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br label %for.body
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for.body:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
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%mul = mul nsw i64 %iv, %s
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%gep = getelementptr inbounds double, double* %Src, i64 %mul
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%bct = bitcast double* %gep to i64*
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%ld = load i64, i64* %bct
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%iv.next = add nuw nsw i64 %iv, 1
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%cmp110.us = icmp slt i64 %iv.next, %n
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br i1 %cmp110.us, label %for.body, label %for.end
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for.end:
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ret void
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; CHECK: LV: Found an estimated cost of 2 for VF 2 For instruction: %mul = mul nsw i64 %iv, %s
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; CHECK: LV: Found an estimated cost of 2 for VF 2 For instruction: %ld = load i64, i64* %bct
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}
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