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clang-p2996/llvm/lib/CodeGen/SelectionDAG
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Serguei Katkov 44f0d7f136 Revert "[Codegen/Statepoint] Allow usage of registers for non gc deopt values." 
This reverts commit a0275705bb.

It causes buildbot failures building LLVM with BUILD_SHARED_LIBS due to a linker error.
2020-04-09 18:24:47 +07:00
..
CMakeLists.txt
[cmake] Explicitly mark libraries defined in lib/ as "Component Libraries"
2019-11-21 10:48:08 -08:00
DAGCombiner.cpp
[SelectionDAG] Make getZeroExtendInReg take a vector VT if the operand VT is a vector.
2020-04-07 11:34:08 -07:00
FastISel.cpp
DAG: Use Register
2020-04-08 13:44:31 -04:00
FunctionLoweringInfo.cpp
DAG: Use Register
2020-04-08 13:44:31 -04:00
InstrEmitter.cpp
DAG: Use Register
2020-04-08 13:44:31 -04:00
InstrEmitter.h
DAG: Use Register
2020-04-08 13:44:31 -04:00
LegalizeDAG.cpp
[SelectionDAG] Make getZeroExtendInReg take a vector VT if the operand VT is a vector.
2020-04-07 11:34:08 -07:00
LegalizeFloatTypes.cpp
[LegalizeTypes] Add SoftenFloatRes_FREEZE
2020-03-31 10:16:38 +09:00
LegalizeIntegerTypes.cpp
[SelectionDAG] Make getZeroExtendInReg take a vector VT if the operand VT is a vector.
2020-04-07 11:34:08 -07:00
LegalizeTypes.cpp
Revert "[DAG] Fix PR45049: LegalizeTypes crash"
2020-04-04 13:47:22 -06:00
LegalizeTypes.h
[SelectionDAG] Make getZeroExtendInReg take a vector VT if the operand VT is a vector.
2020-04-07 11:34:08 -07:00
LegalizeTypesGeneric.cpp
[SelDag] Add FREEZE
2020-03-24 23:04:58 +09:00
LegalizeVectorOps.cpp
[SDAG] Add SDNode::values() = make_range(values_begin(), values_end())
2020-02-26 12:07:38 -06:00
LegalizeVectorTypes.cpp
[Alignment][NFC] Transitionning more getMachineMemOperand call sites
2020-03-31 11:04:10 +00:00
LLVMBuild.txt
…
ResourcePriorityQueue.cpp
…
ScheduleDAGFast.cpp
DAG: Use Register
2020-04-08 13:44:31 -04:00
ScheduleDAGRRList.cpp
…
ScheduleDAGSDNodes.cpp
DAG: Use Register
2020-04-08 13:44:31 -04:00
ScheduleDAGSDNodes.h
DAG: Use Register
2020-04-08 13:44:31 -04:00
ScheduleDAGVLIW.cpp
Prune Analysis includes from SelectionDAG.h
2019-10-19 01:07:48 +00:00
SDNodeDbgValue.h
…
SelectionDAG.cpp
[KnownBits] Move AND, OR and XOR logic into KnownBits
2020-04-09 10:10:37 +01:00
SelectionDAGAddressAnalysis.cpp
Prune a LegacyDivergenceAnalysis and MachineLoopInfo include each
2019-10-19 01:31:09 +00:00
SelectionDAGBuilder.cpp
DAG: Use Register
2020-04-08 13:44:31 -04:00
SelectionDAGBuilder.h
[FPEnv] Fix chain handling regression after 04a8696
2020-01-14 14:10:57 +01:00
SelectionDAGDumper.cpp
[X86] Move combineLoopMAddPattern and combineLoopSADPattern to an IR pass before SelecitonDAG.
2020-03-26 14:10:20 -07:00
SelectionDAGISel.cpp
DAG: Use Register
2020-04-08 13:44:31 -04:00
SelectionDAGPrinter.cpp
Make llvm::StringRef to std::string conversions explicit.
2020-01-28 23:25:25 +01:00
SelectionDAGTargetInfo.cpp
…
StatepointLowering.cpp
Revert "[Codegen/Statepoint] Allow usage of registers for non gc deopt values."
2020-04-09 18:24:47 +07:00
StatepointLowering.h
…
TargetLowering.cpp
[KnownBits] Move AND, OR and XOR logic into KnownBits
2020-04-09 10:10:37 +01:00