Felipe de Azevedo Piovezan aba1bea673 [SelectionDAGBuilder] Handle entry_value dbg.value intrinsics ...

Summary:
DbgValue intrinsics whose expression is an entry_value and whose address is
described an llvm::Argument must be lowered to the corresponding livein physical
register for that Argument.

Depends on D151329

Reviewers: aprantl

Subscribers:

2023-05-26 06:55:49 -04:00

..

CMakeLists.txt

Split out CodeGenTypes from CodeGen for LLT/MVT

2023-05-03 00:13:20 +09:00

DAGCombiner.cpp

[NFC][DAGCombiner]: Only consider nodes with no uses for pruning when forming initial worklist

2023-05-25 19:48:30 +05:30

FastISel.cpp

[SelectionDAG][NFCI] Use common logic for identifying MMI vars

2023-05-03 10:58:31 -04:00

FunctionLoweringInfo.cpp

[1/11][IR] Permit load/store/alloca for struct of the same scalable vector type

2023-05-19 09:39:36 -07:00

InstrEmitter.cpp

Use ArrayRef instead of raw pointers. NFC

2023-02-02 12:53:49 +07:00

InstrEmitter.h

[DebugInfo] Store instr-ref mode of MachineFunction in member

2023-01-20 14:47:11 +00:00

LegalizeDAG.cpp

[DAG] Add TargetLowering::expandABD and convert X86 lowering to use it

2023-05-05 15:13:23 +01:00

LegalizeFloatTypes.cpp

…

LegalizeIntegerTypes.cpp

[SelectionDAG][AArch64][ARM] Remove setFlags call from DAGTypeLegalizer::SetPromotedInteger.

2023-05-25 11:01:19 -07:00

LegalizeTypes.cpp

[SelectionDAG][AArch64][ARM] Remove setFlags call from DAGTypeLegalizer::SetPromotedInteger.

2023-05-25 11:01:19 -07:00

LegalizeTypes.h

[LegalizeType][X86] Support WidenVecRes_AssertZext and SplitVecRes_AssertZext for ISD::AssertZext during LegalizeType procedure

2023-05-24 10:17:08 +08:00

LegalizeTypesGeneric.cpp

[LegalizeType][X86] Support WidenVecRes_AssertZext and SplitVecRes_AssertZext for ISD::AssertZext during LegalizeType procedure

2023-05-24 10:17:08 +08:00

LegalizeVectorOps.cpp

[LegalizeVectorOps][AArch64][RISCV][X86] Use OpVT for ISD::SETCC in LegalizeVectorOps.

2023-05-13 23:33:00 -07:00

LegalizeVectorTypes.cpp

[LegalizeType][X86] Support WidenVecRes_AssertZext and SplitVecRes_AssertZext for ISD::AssertZext during LegalizeType procedure

2023-05-24 10:17:08 +08:00

ResourcePriorityQueue.cpp

…

ScheduleDAGFast.cpp

Fix uninitialized scalar members in CodeGen

2023-04-21 12:22:34 +08:00

ScheduleDAGRRList.cpp

Restore CodeGen/MachineValueType.h from Support

2023-05-03 00:13:20 +09:00

ScheduleDAGSDNodes.cpp

Clean come dead code

2023-04-23 20:46:34 -04:00

ScheduleDAGSDNodes.h

Restore CodeGen/MachineValueType.h from Support

2023-05-03 00:13:20 +09:00

ScheduleDAGVLIW.cpp

…

SDNodeDbgValue.h

[DebugInfo] Remove dbg.addr from CodeGen

2023-03-02 09:29:43 +00:00

SelectionDAG.cpp

Revert "[SelectionDAG] Handle NSW for ADD/SUB in computeKnownBits()"

2023-05-25 11:13:51 +02:00

SelectionDAGAddressAnalysis.cpp

…

SelectionDAGBuilder.cpp

[SelectionDAGBuilder] Handle entry_value dbg.value intrinsics

2023-05-26 06:55:49 -04:00

SelectionDAGBuilder.h

Restore CodeGen/MachineValueType.h from Support

2023-05-03 00:13:20 +09:00

SelectionDAGDumper.cpp

Restore CodeGen/MachineValueType.h from Support

2023-05-03 00:13:20 +09:00

SelectionDAGISel.cpp

[SelectionDAG][DebugInfo] Implement translation of entry_value vars

2023-05-12 12:00:13 -04:00

SelectionDAGPrinter.cpp

…

SelectionDAGTargetInfo.cpp

…

StatepointLowering.cpp

Restore CodeGen/MachineValueType.h from Support

2023-05-03 00:13:20 +09:00

StatepointLowering.h

…

TargetLowering.cpp

Revert "[SelectionDAG] Handle NSW for ADD/SUB in computeKnownBits()"

2023-05-25 11:13:51 +02:00