Craig Topper 7aa906dda5 [RISCV] Merge the Arch and Exts variables in RISCVISAInfo::parseArchString. NFC

2024-07-03 12:11:47 -07:00

..

Unix

…

Windows

…

AArch64TargetParser.cpp

[llvm][AArch64][TableGen] Create a ProcessorAlias record (#96249)

2024-06-28 12:45:02 -07:00

ARMTargetParser.cpp

[llvm] Use StringRef::operator== instead of StringRef::equals (NFC) (#91441)

2024-05-08 10:33:53 -07:00

ARMTargetParserCommon.cpp

Update FEAT_PAuth_LR behaviour for AArch64 (#90614)

2024-05-10 08:09:02 +01:00

CMakeLists.txt

[ARM][AArch64] autogenerate header file for TargetParser from Target tablegen files (#88378)

2024-04-24 09:18:36 +01:00

CSKYTargetParser.cpp

[llvm] Use StringRef::{starts,ends}_with (NFC) (#74956)

2023-12-11 21:01:36 -08:00

Host.cpp

[AArch64] Add support for Cortex-A725 and Cortex-X925 (#95214)

2024-06-13 00:00:57 +01:00

LoongArchTargetParser.cpp

…

RISCVISAInfo.cpp

[RISCV] Merge the Arch and Exts variables in RISCVISAInfo::parseArchString. NFC

2024-07-03 12:11:47 -07:00

RISCVTargetParser.cpp

[RISCV] Split code that tablegen needs out of RISCVISAInfo. (#89684)

2024-04-23 15:12:36 -07:00

SubtargetFeature.cpp

…

TargetParser.cpp

[clang][SPIR-V] Add support for AMDGCN flavoured SPIRV (#89796)

2024-06-07 11:50:23 +01:00

Triple.cpp

[DirectX] Reapply Fix DXIL part header version encoding (#91956)

2024-05-13 18:50:16 -04:00

X86TargetParser.cpp

[X86] Add sub-feature zu (zero upper) for APX

2024-06-25 09:25:32 +08:00