8c865cacda
This adds support for the new family of conditional selection / increment / negation instructions; the low-overhead branch instructions (e.g. BF, WLS, DLS); the CLRM instruction to zero a whole list of registers at once; the new VMRS/VMSR and VLDR/VSTR instructions to get data in and out of 8.1-M system registers, particularly including the new VPR register used by MVE vector predication. To support this, we also add a register name 'zr' (used by the CSEL family to force one of the inputs to the constant 0), and operand types for lists of registers that are also allowed to include APSR or VPR (used by CLRM). The VLDR/VSTR instructions also need a new addressing mode. The low-overhead branch instructions exist in their own separate architecture extension, which we treat as enabled by default, but you can say -mattr=-lob or equivalent to turn it off. Reviewers: dmgreen, samparker, SjoerdMeijer, t.p.northover Reviewed By: samparker Subscribers: miyuki, javed.absar, kristof.beyls, hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D62667 llvm-svn: 363039
268 lines
8.8 KiB
C++
268 lines
8.8 KiB
C++
//===-- ARMELFObjectWriter.cpp - ARM ELF Writer ---------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "MCTargetDesc/ARMFixupKinds.h"
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#include "MCTargetDesc/ARMMCTargetDesc.h"
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#include "llvm/BinaryFormat/ELF.h"
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#include "llvm/MC/MCContext.h"
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#include "llvm/MC/MCELFObjectWriter.h"
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#include "llvm/MC/MCExpr.h"
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#include "llvm/MC/MCFixup.h"
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#include "llvm/MC/MCObjectFileInfo.h"
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#include "llvm/MC/MCObjectWriter.h"
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#include "llvm/MC/MCValue.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/raw_ostream.h"
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#include <cstdint>
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using namespace llvm;
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namespace {
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class ARMELFObjectWriter : public MCELFObjectTargetWriter {
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enum { DefaultEABIVersion = 0x05000000U };
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unsigned GetRelocTypeInner(const MCValue &Target, const MCFixup &Fixup,
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bool IsPCRel, MCContext &Ctx) const;
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public:
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ARMELFObjectWriter(uint8_t OSABI);
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~ARMELFObjectWriter() override = default;
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unsigned getRelocType(MCContext &Ctx, const MCValue &Target,
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const MCFixup &Fixup, bool IsPCRel) const override;
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bool needsRelocateWithSymbol(const MCSymbol &Sym,
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unsigned Type) const override;
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void addTargetSectionFlags(MCContext &Ctx, MCSectionELF &Sec) override;
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};
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} // end anonymous namespace
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ARMELFObjectWriter::ARMELFObjectWriter(uint8_t OSABI)
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: MCELFObjectTargetWriter(/*Is64Bit*/ false, OSABI,
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ELF::EM_ARM,
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/*HasRelocationAddend*/ false) {}
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bool ARMELFObjectWriter::needsRelocateWithSymbol(const MCSymbol &Sym,
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unsigned Type) const {
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// FIXME: This is extremely conservative. This really needs to use a
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// whitelist with a clear explanation for why each realocation needs to
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// point to the symbol, not to the section.
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switch (Type) {
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default:
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return true;
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case ELF::R_ARM_PREL31:
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case ELF::R_ARM_ABS32:
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return false;
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}
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}
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// Need to examine the Fixup when determining whether to
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// emit the relocation as an explicit symbol or as a section relative
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// offset
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unsigned ARMELFObjectWriter::getRelocType(MCContext &Ctx, const MCValue &Target,
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const MCFixup &Fixup,
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bool IsPCRel) const {
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return GetRelocTypeInner(Target, Fixup, IsPCRel, Ctx);
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}
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unsigned ARMELFObjectWriter::GetRelocTypeInner(const MCValue &Target,
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const MCFixup &Fixup,
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bool IsPCRel,
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MCContext &Ctx) const {
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MCSymbolRefExpr::VariantKind Modifier = Target.getAccessVariant();
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if (IsPCRel) {
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switch ((unsigned)Fixup.getKind()) {
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default:
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Ctx.reportFatalError(Fixup.getLoc(), "unsupported relocation on symbol");
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return ELF::R_ARM_NONE;
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case FK_Data_4:
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switch (Modifier) {
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default:
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llvm_unreachable("Unsupported Modifier");
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case MCSymbolRefExpr::VK_None:
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return ELF::R_ARM_REL32;
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case MCSymbolRefExpr::VK_GOTTPOFF:
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return ELF::R_ARM_TLS_IE32;
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case MCSymbolRefExpr::VK_ARM_GOT_PREL:
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return ELF::R_ARM_GOT_PREL;
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case MCSymbolRefExpr::VK_ARM_PREL31:
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return ELF::R_ARM_PREL31;
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}
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case ARM::fixup_arm_blx:
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case ARM::fixup_arm_uncondbl:
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switch (Modifier) {
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case MCSymbolRefExpr::VK_PLT:
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return ELF::R_ARM_CALL;
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case MCSymbolRefExpr::VK_TLSCALL:
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return ELF::R_ARM_TLS_CALL;
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default:
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return ELF::R_ARM_CALL;
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}
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case ARM::fixup_arm_condbl:
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case ARM::fixup_arm_condbranch:
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case ARM::fixup_arm_uncondbranch:
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return ELF::R_ARM_JUMP24;
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case ARM::fixup_t2_condbranch:
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return ELF::R_ARM_THM_JUMP19;
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case ARM::fixup_t2_uncondbranch:
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return ELF::R_ARM_THM_JUMP24;
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case ARM::fixup_arm_movt_hi16:
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return ELF::R_ARM_MOVT_PREL;
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case ARM::fixup_arm_movw_lo16:
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return ELF::R_ARM_MOVW_PREL_NC;
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case ARM::fixup_t2_movt_hi16:
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return ELF::R_ARM_THM_MOVT_PREL;
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case ARM::fixup_t2_movw_lo16:
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return ELF::R_ARM_THM_MOVW_PREL_NC;
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case ARM::fixup_arm_thumb_br:
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return ELF::R_ARM_THM_JUMP11;
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case ARM::fixup_arm_thumb_bcc:
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return ELF::R_ARM_THM_JUMP8;
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case ARM::fixup_arm_thumb_bl:
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case ARM::fixup_arm_thumb_blx:
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switch (Modifier) {
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case MCSymbolRefExpr::VK_TLSCALL:
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return ELF::R_ARM_THM_TLS_CALL;
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default:
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return ELF::R_ARM_THM_CALL;
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}
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case ARM::fixup_bf_target:
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return ELF::R_ARM_THM_BF16;
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case ARM::fixup_bfc_target:
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return ELF::R_ARM_THM_BF12;
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case ARM::fixup_bfl_target:
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return ELF::R_ARM_THM_BF18;
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}
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}
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switch ((unsigned)Fixup.getKind()) {
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default:
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Ctx.reportFatalError(Fixup.getLoc(), "unsupported relocation on symbol");
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return ELF::R_ARM_NONE;
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case FK_NONE:
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return ELF::R_ARM_NONE;
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case FK_Data_1:
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switch (Modifier) {
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default:
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llvm_unreachable("unsupported Modifier");
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case MCSymbolRefExpr::VK_None:
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return ELF::R_ARM_ABS8;
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}
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case FK_Data_2:
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switch (Modifier) {
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default:
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llvm_unreachable("unsupported modifier");
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case MCSymbolRefExpr::VK_None:
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return ELF::R_ARM_ABS16;
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}
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case FK_Data_4:
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switch (Modifier) {
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default:
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llvm_unreachable("Unsupported Modifier");
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case MCSymbolRefExpr::VK_ARM_NONE:
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return ELF::R_ARM_NONE;
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case MCSymbolRefExpr::VK_GOT:
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return ELF::R_ARM_GOT_BREL;
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case MCSymbolRefExpr::VK_TLSGD:
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return ELF::R_ARM_TLS_GD32;
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case MCSymbolRefExpr::VK_TPOFF:
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return ELF::R_ARM_TLS_LE32;
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case MCSymbolRefExpr::VK_GOTTPOFF:
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return ELF::R_ARM_TLS_IE32;
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case MCSymbolRefExpr::VK_None:
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return ELF::R_ARM_ABS32;
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case MCSymbolRefExpr::VK_GOTOFF:
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return ELF::R_ARM_GOTOFF32;
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case MCSymbolRefExpr::VK_ARM_GOT_PREL:
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return ELF::R_ARM_GOT_PREL;
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case MCSymbolRefExpr::VK_ARM_TARGET1:
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return ELF::R_ARM_TARGET1;
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case MCSymbolRefExpr::VK_ARM_TARGET2:
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return ELF::R_ARM_TARGET2;
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case MCSymbolRefExpr::VK_ARM_PREL31:
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return ELF::R_ARM_PREL31;
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case MCSymbolRefExpr::VK_ARM_SBREL:
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return ELF::R_ARM_SBREL32;
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case MCSymbolRefExpr::VK_ARM_TLSLDO:
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return ELF::R_ARM_TLS_LDO32;
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case MCSymbolRefExpr::VK_TLSCALL:
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return ELF::R_ARM_TLS_CALL;
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case MCSymbolRefExpr::VK_TLSDESC:
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return ELF::R_ARM_TLS_GOTDESC;
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case MCSymbolRefExpr::VK_TLSLDM:
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return ELF::R_ARM_TLS_LDM32;
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case MCSymbolRefExpr::VK_ARM_TLSDESCSEQ:
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return ELF::R_ARM_TLS_DESCSEQ;
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}
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case ARM::fixup_arm_condbranch:
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case ARM::fixup_arm_uncondbranch:
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return ELF::R_ARM_JUMP24;
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case ARM::fixup_arm_movt_hi16:
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switch (Modifier) {
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default:
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llvm_unreachable("Unsupported Modifier");
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case MCSymbolRefExpr::VK_None:
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return ELF::R_ARM_MOVT_ABS;
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case MCSymbolRefExpr::VK_ARM_SBREL:
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return ELF::R_ARM_MOVT_BREL;
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}
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case ARM::fixup_arm_movw_lo16:
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switch (Modifier) {
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default:
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llvm_unreachable("Unsupported Modifier");
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case MCSymbolRefExpr::VK_None:
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return ELF::R_ARM_MOVW_ABS_NC;
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case MCSymbolRefExpr::VK_ARM_SBREL:
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return ELF::R_ARM_MOVW_BREL_NC;
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}
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case ARM::fixup_t2_movt_hi16:
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switch (Modifier) {
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default:
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llvm_unreachable("Unsupported Modifier");
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case MCSymbolRefExpr::VK_None:
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return ELF::R_ARM_THM_MOVT_ABS;
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case MCSymbolRefExpr::VK_ARM_SBREL:
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return ELF::R_ARM_THM_MOVT_BREL;
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}
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case ARM::fixup_t2_movw_lo16:
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switch (Modifier) {
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default:
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llvm_unreachable("Unsupported Modifier");
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case MCSymbolRefExpr::VK_None:
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return ELF::R_ARM_THM_MOVW_ABS_NC;
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case MCSymbolRefExpr::VK_ARM_SBREL:
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return ELF::R_ARM_THM_MOVW_BREL_NC;
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}
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}
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}
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void ARMELFObjectWriter::addTargetSectionFlags(MCContext &Ctx,
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MCSectionELF &Sec) {
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// The mix of execute-only and non-execute-only at link time is
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// non-execute-only. To avoid the empty implicitly created .text
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// section from making the whole .text section non-execute-only, we
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// mark it execute-only if it is empty and there is at least one
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// execute-only section in the object.
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MCSectionELF *TextSection =
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static_cast<MCSectionELF *>(Ctx.getObjectFileInfo()->getTextSection());
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if (Sec.getKind().isExecuteOnly() && !TextSection->hasInstructions() &&
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!TextSection->hasData()) {
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TextSection->setFlags(TextSection->getFlags() | ELF::SHF_ARM_PURECODE);
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}
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}
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std::unique_ptr<MCObjectTargetWriter>
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llvm::createARMELFObjectWriter(uint8_t OSABI) {
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return llvm::make_unique<ARMELFObjectWriter>(OSABI);
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}
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