to reflect the new license. We understand that people may be surprised that we're moving the header entirely to discuss the new license. We checked this carefully with the Foundation's lawyer and we believe this is the correct approach. Essentially, all code in the project is now made available by the LLVM project under our new license, so you will see that the license headers include that license only. Some of our contributors have contributed code under our old license, and accordingly, we have retained a copy of our old license notice in the top-level files in each project and repository. llvm-svn: 351636
134 lines
4.8 KiB
C++
134 lines
4.8 KiB
C++
//===-- SystemZMCAsmBackend.cpp - SystemZ assembler backend ---------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "MCTargetDesc/SystemZMCFixups.h"
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#include "MCTargetDesc/SystemZMCTargetDesc.h"
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#include "llvm/MC/MCAsmBackend.h"
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#include "llvm/MC/MCELFObjectWriter.h"
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#include "llvm/MC/MCFixupKindInfo.h"
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#include "llvm/MC/MCInst.h"
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#include "llvm/MC/MCObjectWriter.h"
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#include "llvm/MC/MCSubtargetInfo.h"
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using namespace llvm;
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// Value is a fully-resolved relocation value: Symbol + Addend [- Pivot].
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// Return the bits that should be installed in a relocation field for
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// fixup kind Kind.
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static uint64_t extractBitsForFixup(MCFixupKind Kind, uint64_t Value) {
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if (Kind < FirstTargetFixupKind)
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return Value;
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switch (unsigned(Kind)) {
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case SystemZ::FK_390_PC12DBL:
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case SystemZ::FK_390_PC16DBL:
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case SystemZ::FK_390_PC24DBL:
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case SystemZ::FK_390_PC32DBL:
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return (int64_t)Value / 2;
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case SystemZ::FK_390_TLS_CALL:
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return 0;
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}
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llvm_unreachable("Unknown fixup kind!");
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}
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namespace {
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class SystemZMCAsmBackend : public MCAsmBackend {
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uint8_t OSABI;
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public:
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SystemZMCAsmBackend(uint8_t osABI)
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: MCAsmBackend(support::big), OSABI(osABI) {}
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// Override MCAsmBackend
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unsigned getNumFixupKinds() const override {
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return SystemZ::NumTargetFixupKinds;
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}
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const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;
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void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
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const MCValue &Target, MutableArrayRef<char> Data,
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uint64_t Value, bool IsResolved,
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const MCSubtargetInfo *STI) const override;
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bool mayNeedRelaxation(const MCInst &Inst,
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const MCSubtargetInfo &STI) const override {
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return false;
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}
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bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
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const MCRelaxableFragment *Fragment,
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const MCAsmLayout &Layout) const override {
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return false;
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}
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void relaxInstruction(const MCInst &Inst, const MCSubtargetInfo &STI,
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MCInst &Res) const override {
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llvm_unreachable("SystemZ does do not have assembler relaxation");
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}
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bool writeNopData(raw_ostream &OS, uint64_t Count) const override;
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std::unique_ptr<MCObjectTargetWriter>
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createObjectTargetWriter() const override {
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return createSystemZObjectWriter(OSABI);
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}
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};
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} // end anonymous namespace
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const MCFixupKindInfo &
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SystemZMCAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
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const static MCFixupKindInfo Infos[SystemZ::NumTargetFixupKinds] = {
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{ "FK_390_PC12DBL", 4, 12, MCFixupKindInfo::FKF_IsPCRel },
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{ "FK_390_PC16DBL", 0, 16, MCFixupKindInfo::FKF_IsPCRel },
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{ "FK_390_PC24DBL", 0, 24, MCFixupKindInfo::FKF_IsPCRel },
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{ "FK_390_PC32DBL", 0, 32, MCFixupKindInfo::FKF_IsPCRel },
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{ "FK_390_TLS_CALL", 0, 0, 0 }
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};
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if (Kind < FirstTargetFixupKind)
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return MCAsmBackend::getFixupKindInfo(Kind);
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assert(unsigned(Kind - FirstTargetFixupKind) < getNumFixupKinds() &&
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"Invalid kind!");
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return Infos[Kind - FirstTargetFixupKind];
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}
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void SystemZMCAsmBackend::applyFixup(const MCAssembler &Asm,
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const MCFixup &Fixup,
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const MCValue &Target,
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MutableArrayRef<char> Data, uint64_t Value,
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bool IsResolved,
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const MCSubtargetInfo *STI) const {
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MCFixupKind Kind = Fixup.getKind();
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unsigned Offset = Fixup.getOffset();
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unsigned BitSize = getFixupKindInfo(Kind).TargetSize;
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unsigned Size = (BitSize + 7) / 8;
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assert(Offset + Size <= Data.size() && "Invalid fixup offset!");
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// Big-endian insertion of Size bytes.
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Value = extractBitsForFixup(Kind, Value);
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if (BitSize < 64)
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Value &= ((uint64_t)1 << BitSize) - 1;
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unsigned ShiftValue = (Size * 8) - 8;
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for (unsigned I = 0; I != Size; ++I) {
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Data[Offset + I] |= uint8_t(Value >> ShiftValue);
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ShiftValue -= 8;
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}
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}
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bool SystemZMCAsmBackend::writeNopData(raw_ostream &OS, uint64_t Count) const {
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for (uint64_t I = 0; I != Count; ++I)
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OS << '\x7';
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return true;
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}
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MCAsmBackend *llvm::createSystemZMCAsmBackend(const Target &T,
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const MCSubtargetInfo &STI,
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const MCRegisterInfo &MRI,
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const MCTargetOptions &Options) {
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uint8_t OSABI =
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MCELFObjectTargetWriter::getOSABI(STI.getTargetTriple().getOS());
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return new SystemZMCAsmBackend(OSABI);
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}
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