56d0ed2a50
Summary: This is patch #3 of the new DivergenceAnalysis <https://lists.llvm.org/pipermail/llvm-dev/2018-May/123606.html> The GPUDivergenceAnalysis is intended to eventually supersede the existing LegacyDivergenceAnalysis. The existing LegacyDivergenceAnalysis produces incorrect results on unstructured Control-Flow Graphs: <https://bugs.llvm.org/show_bug.cgi?id=37185> This patch adds the option -use-gpu-divergence-analysis to the LegacyDivergenceAnalysis to turn it into a transparent wrapper for the GPUDivergenceAnalysis. Reviewers: nhaehnle Reviewed By: nhaehnle Subscribers: jholewinski, jvesely, jfb, llvm-commits, alex-t, sameerds, arsenm, nhaehnle Differential Revision: https://reviews.llvm.org/D53493 llvm-svn: 348048
42 lines
1.4 KiB
LLVM
42 lines
1.4 KiB
LLVM
; RUN: opt %s -mtriple amdgcn-- -analyze -divergence -use-gpu-divergence-analysis | FileCheck %s
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; CHECK-LABEL: Printing analysis 'Legacy Divergence Analysis' for function 'test_amdgpu_ps':
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; CHECK: DIVERGENT:
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; CHECK-NOT: %arg0
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; CHECK-NOT: %arg1
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; CHECK-NOT: %arg2
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; CHECK: <2 x i32> %arg3
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; CHECK: DIVERGENT: <3 x i32> %arg4
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; CHECK: DIVERGENT: float %arg5
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; CHECK: DIVERGENT: i32 %arg6
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define amdgpu_ps void @test_amdgpu_ps([4 x <16 x i8>] addrspace(2)* byval %arg0, float inreg %arg1, i32 inreg %arg2, <2 x i32> %arg3, <3 x i32> %arg4, float %arg5, i32 %arg6) #0 {
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ret void
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}
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; CHECK-LABEL: Printing analysis 'Legacy Divergence Analysis' for function 'test_amdgpu_kernel':
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; CHECK-NOT: %arg0
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; CHECK-NOT: %arg1
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; CHECK-NOT: %arg2
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; CHECK-NOT: %arg3
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; CHECK-NOT: %arg4
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; CHECK-NOT: %arg5
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; CHECK-NOT: %arg6
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define amdgpu_kernel void @test_amdgpu_kernel([4 x <16 x i8>] addrspace(2)* byval %arg0, float inreg %arg1, i32 inreg %arg2, <2 x i32> %arg3, <3 x i32> %arg4, float %arg5, i32 %arg6) #0 {
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ret void
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}
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; CHECK-LABEL: Printing analysis 'Legacy Divergence Analysis' for function 'test_c':
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; CHECK: DIVERGENT:
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; CHECK: DIVERGENT:
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; CHECK: DIVERGENT:
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; CHECK: DIVERGENT:
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; CHECK: DIVERGENT:
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; CHECK: DIVERGENT:
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; CHECK: DIVERGENT:
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define void @test_c([4 x <16 x i8>] addrspace(2)* byval %arg0, float inreg %arg1, i32 inreg %arg2, <2 x i32> %arg3, <3 x i32> %arg4, float %arg5, i32 %arg6) #0 {
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ret void
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}
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attributes #0 = { nounwind }
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