d2210af332
Current findBestLoopTop can find and move one kind of block to top, a latch block has one successor. Another common case is:
* a latch block
* it has two successors, one is loop header, another is exit
* it has more than one predecessors
If it is below one of its predecessors P, only P can fall through to it, all other predecessors need a jump to it, and another conditional jump to loop header. If it is moved before loop header, all its predecessors jump to it, then fall through to loop header. So all its predecessors except P can reduce one taken branch.
Differential Revision: https://reviews.llvm.org/D43256
llvm-svn: 363471
57 lines
1.9 KiB
LLVM
57 lines
1.9 KiB
LLVM
; RUN: llc -mtriple=amdgcn-- -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
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; RUN: llc -mtriple=amdgcn-- -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
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; SI-LABEL: {{^}}i1_copy_from_loop:
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;
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; SI: ; %Flow
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; SI-DAG: s_andn2_b64 [[LCSSA_ACCUM:s\[[0-9]+:[0-9]+\]]], [[LCSSA_ACCUM]], exec
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; SI-DAG: s_and_b64 [[CC_MASK2:s\[[0-9]+:[0-9]+\]]], [[CC_ACCUM:s\[[0-9]+:[0-9]+\]]], exec
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; SI: s_or_b64 [[LCSSA_ACCUM]], [[LCSSA_ACCUM]], [[CC_MASK2]]
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; SI: ; %for.body
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; SI: v_cmp_gt_u32_e64 [[CC_SREG:s\[[0-9]+:[0-9]+\]]], 4,
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; SI-DAG: s_andn2_b64 [[CC_ACCUM]], [[CC_ACCUM]], exec
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; SI-DAG: s_and_b64 [[CC_MASK:s\[[0-9]+:[0-9]+\]]], [[CC_SREG]], exec
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; SI: s_or_b64 [[CC_ACCUM]], [[CC_ACCUM]], [[CC_MASK]]
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; SI: ; %Flow1
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; SI: s_or_b64 [[CC_ACCUM]], [[CC_ACCUM]], exec
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; SI: ; %for.end
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; SI: s_and_saveexec_b64 {{s\[[0-9]+:[0-9]+\]}}, [[LCSSA_ACCUM]]
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define amdgpu_ps void @i1_copy_from_loop(<4 x i32> inreg %rsrc, i32 %tid) {
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entry:
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br label %for.body
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for.body:
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%i = phi i32 [0, %entry], [%i.inc, %end.loop]
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%cc = icmp ult i32 %i, 4
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br i1 %cc, label %mid.loop, label %for.end
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mid.loop:
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%v = call float @llvm.amdgcn.buffer.load.f32(<4 x i32> %rsrc, i32 %tid, i32 %i, i1 false, i1 false)
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%cc2 = fcmp oge float %v, 0.0
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br i1 %cc2, label %end.loop, label %for.end
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end.loop:
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%i.inc = add i32 %i, 1
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br label %for.body
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for.end:
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br i1 %cc, label %if, label %end
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if:
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call void @llvm.amdgcn.exp.f32(i32 0, i32 15, float undef, float undef, float undef, float undef, i1 true, i1 true)
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br label %end
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end:
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ret void
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}
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declare float @llvm.amdgcn.buffer.load.f32(<4 x i32>, i32, i32, i1, i1) #0
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declare void @llvm.amdgcn.exp.f32(i32, i32, float, float, float, float, i1, i1) #1
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attributes #0 = { nounwind readonly }
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attributes #1 = { nounwind inaccessiblememonly }
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