ab1d73ee32
The current implementation of ThumbRegisterInfo::saveScavengerRegister is bad for two reasons: one, it's buggy, and two, it blocks using R12 for other optimizations. So this patch gets rid of it, and adds the necessary support for using an ordinary emergency spill slot on Thumb1. (Specifically, I think saveScavengerRegister was broken by r305625, and nobody noticed for two years because the codepath is almost never used. The new code will also probably not be used much, but it now has better tests, and if we fail to emit a necessary emergency spill slot we get a reasonable error message instead of a miscompile.) A rough outline of the changes in the patch: 1. Gets rid of ThumbRegisterInfo::saveScavengerRegister. 2. Modifies ARMFrameLowering::determineCalleeSaves to allocate an emergency spill slot for Thumb1. 3. Implements useFPForScavengingIndex, so the emergency spill slot isn't placed at a negative offset from FP on Thumb1. 4. Modifies the heuristics for allocating an emergency spill slot to support Thumb1. This includes fixing ExtraCSSpill so we don't try to use "lr" as a substitute for allocating an emergency spill slot. 5. Allocates a base pointer in more cases, so the emergency spill slot is always accessible. 6. Modifies ARMFrameLowering::ResolveFrameIndexReference to compute the right offset in the new cases where we're forcing a base pointer. 7. Ensures we never generate a load or store with an offset outside of its frame object. This makes the heuristics more straightforward. 8. Changes Thumb1 prologue and epilogue emission so it never uses register scavenging. Some of the changes to the emergency spill slot heuristics in determineCalleeSaves affect ARM/Thumb2; hopefully, they should allow the compiler to avoid allocating an emergency spill slot in cases where it isn't necessary. The rest of the changes should only affect Thumb1. Differential Revision: https://reviews.llvm.org/D63677 llvm-svn: 364490
127 lines
3.1 KiB
LLVM
127 lines
3.1 KiB
LLVM
; RUN: llc < %s -mtriple=thumbv6-apple-darwin | FileCheck %s
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; RUN: llc < %s -mtriple=thumbv6-apple-darwin -regalloc=basic | FileCheck %s
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; RUN: llc < %s -o %t -filetype=obj -mtriple=thumbv6-apple-darwin
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; RUN: llvm-objdump -triple=thumbv6-apple-darwin -d %t | FileCheck %s
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@__bar = external hidden global i8*
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@__baz = external hidden global i8*
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; rdar://8819685
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define i8* @_foo() {
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entry:
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; CHECK-LABEL: foo:
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%size = alloca i32, align 4
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%0 = load i8*, i8** @__bar, align 4
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%1 = icmp eq i8* %0, null
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br i1 %1, label %bb1, label %bb3
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; CHECK: bne
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bb1:
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store i32 1026, i32* %size, align 4
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%2 = alloca [1026 x i8], align 1
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; CHECK: mov [[R0:r[0-9]+]], sp
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; CHECK: adds {{r[0-9]+}}, [[R0]], {{r[0-9]+}}
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%3 = getelementptr inbounds [1026 x i8], [1026 x i8]* %2, i32 0, i32 0
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%4 = call i32 @_called_func(i8* %3, i32* %size) nounwind
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%5 = icmp eq i32 %4, 0
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br i1 %5, label %bb2, label %bb3
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bb2:
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%6 = call i8* @strdup(i8* %3) nounwind
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store i8* %6, i8** @__baz, align 4
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br label %bb3
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bb3:
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%.0 = phi i8* [ %0, %entry ], [ %6, %bb2 ], [ %3, %bb1 ]
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; CHECK: subs r4, r7, #7
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; CHECK-NEXT: subs r4, #1
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; CHECK-NEXT: mov sp, r4
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; CHECK-NEXT: pop {r4, r6, r7, pc}
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ret i8* %.0
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}
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declare noalias i8* @strdup(i8* nocapture) nounwind
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declare i32 @_called_func(i8*, i32*) nounwind
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; Simple variable ending up *at* sp.
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define void @test_simple_var() {
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; CHECK-LABEL: test_simple_var:
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%addr32 = alloca i32
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%addr8 = bitcast i32* %addr32 to i8*
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; CHECK: mov r0, sp
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; CHECK-NOT: adds r0
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; CHECK: bl
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call void @take_ptr(i8* %addr8)
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ret void
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}
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; Simple variable ending up at aligned offset from sp.
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define void @test_local_var_addr_aligned() {
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; CHECK-LABEL: test_local_var_addr_aligned:
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%addr1.32 = alloca i32
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%addr1 = bitcast i32* %addr1.32 to i8*
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%addr2.32 = alloca i32
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%addr2 = bitcast i32* %addr2.32 to i8*
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; CHECK: add r0, sp, #{{[0-9]+}}
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; CHECK: bl
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call void @take_ptr(i8* %addr1)
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; CHECK: mov r0, sp
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; CHECK-NOT: add r0
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; CHECK: bl
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call void @take_ptr(i8* %addr2)
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ret void
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}
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; Simple variable ending up at aligned offset from sp.
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define void @test_local_var_big_offset() {
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; CHECK-LABEL: test_local_var_big_offset:
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%addr1.32 = alloca i32, i32 257
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%addr1 = bitcast i32* %addr1.32 to i8*
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%addr2.32 = alloca i32, i32 257
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; CHECK: add [[RTMP:r[0-9]+]], sp, #1020
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; CHECK: adds [[RTMP]], #8
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; CHECK: bl
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call void @take_ptr(i8* %addr1)
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ret void
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}
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; Max range addressable with tADDrSPi
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define void @test_local_var_offset_1020() {
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; CHECK-LABEL: test_local_var_offset_1020
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%addr1 = alloca i8, i32 4
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%addr2 = alloca i8, i32 1020
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; CHECK: add r0, sp, #1020
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; CHECK-NEXT: bl
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call void @take_ptr(i8* %addr1)
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ret void
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}
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; Max range addressable with tADDrSPi + tADDi8 is 1275, however the automatic
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; 4-byte aligning of objects on the stack combined with 8-byte stack alignment
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; means that 1268 is the max offset we can use.
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define void @test_local_var_offset_1268() {
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; CHECK-LABEL: test_local_var_offset_1268
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%addr1 = alloca i8, i32 1
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%addr2 = alloca i8, i32 1268
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; CHECK: add r0, sp, #1020
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; CHECK: adds r0, #248
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; CHECK-NEXT: bl
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call void @take_ptr(i8* %addr1)
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ret void
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}
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declare void @take_ptr(i8*)
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