Sam Parker c760b5da11 [ARM][LowOverheadLoops] Add CPSR defs ...

Both WhileLoopStart and LoopEnd may get turned into a cmp and br pair,
so add an implicit def to these pseudo instructions in case that WLS
and LE aren't generated.

Differential Revision: https://reviews.llvm.org/D65275

llvm-svn: 367089

2019-07-26 08:15:01 +00:00

..

branch-targets.ll

[ARM][LowOverheadLoops] Fix branch target codegen

2019-07-23 14:08:46 +00:00

cond-mov.mir

[ARM][LowOverheadLoops] Add CPSR defs

2019-07-26 08:15:01 +00:00

end-positive-offset.mir

[ARM][LowOverheadLoops] Add CPSR defs

2019-07-26 08:15:01 +00:00

loop-guards.ll

…

massive.mir

[ARM][LowOverheadLoops] Add CPSR defs

2019-07-26 08:15:01 +00:00

multiblock-massive.mir

[ARM][LowOverheadLoops] Add CPSR defs

2019-07-26 08:15:01 +00:00

revert-after-call.mir

[ARM][LowOverheadLoops] Add CPSR defs

2019-07-26 08:15:01 +00:00

revert-after-spill.mir

[ARM][LowOverheadLoops] Add CPSR defs

2019-07-26 08:15:01 +00:00

revert-non-loop.mir

[ARM][LowOverheadLoops] Add CPSR defs

2019-07-26 08:15:01 +00:00

revert-while.mir

[ARM][LowOverheadLoops] Add CPSR defs

2019-07-26 08:15:01 +00:00

size-limit.mir

[ARM][LowOverheadLoops] Add CPSR defs

2019-07-26 08:15:01 +00:00

switch.mir

[ARM][LowOverheadLoops] Add CPSR defs

2019-07-26 08:15:01 +00:00

while-negative-offset.mir

[ARM][LowOverheadLoops] Add CPSR defs

2019-07-26 08:15:01 +00:00

while.mir

[ARM][LowOverheadLoops] Add CPSR defs

2019-07-26 08:15:01 +00:00