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clang-p2996/llvm/lib/Target/AMDGPU
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Austin Kerbow 30f18ed387 [AMDGPU] Handle SMRD signed offset immediate 
Summary:
This fixes a few issues related to SMRD offsets. On gfx9 and gfx10 we have a
signed byte offset immediate, however we can overflow into a negative since we
treat it as unsigned.

Also, the SMRD SOFFSET sgpr is an unsigned offset on all subtargets. We
sometimes tried to use negative values here.

Third, S_BUFFER instructions should never use a signed offset immediate.

Differential Revision: https://reviews.llvm.org/D77082
2020-04-02 17:41:52 -07:00
..
AsmParser
[AMDGPU] Implement wave64 DWARF register mapping
2020-02-25 14:00:01 -05:00
Disassembler
[AMDGPU] Remove AMDGPURegisterInfo
2020-02-11 11:13:38 -08:00
MCTargetDesc
[MCInstPrinter] Pass Address parameter to MCOI::OPERAND_PCREL typed operands. NFC
2020-03-26 08:21:15 -07:00
TargetInfo
CMake: Make most target symbols hidden by default
2020-01-14 19:46:52 -08:00
Utils
[AMDGPU] Handle SMRD signed offset immediate
2020-04-02 17:41:52 -07:00
AMDGPU.h
AMDGPU: Stop setting attributes based on TargetOptions
2020-03-27 13:13:43 -07:00
AMDGPU.td
AMDGPU: Remove denormal subtarget features
2020-04-02 17:17:12 -04:00
AMDGPUAliasAnalysis.cpp
…
AMDGPUAliasAnalysis.h
…
AMDGPUAlwaysInlinePass.cpp
AMDGPU: Hack out noinline on functions using LDS globals
2020-04-02 14:12:07 -04:00
AMDGPUAnnotateKernelFeatures.cpp
AMDGPU: Don't handle kernarg.segment.ptr in functions
2020-03-13 12:51:12 -07:00
AMDGPUAnnotateUniformValues.cpp
Sink all InitializePasses.h includes
2019-11-13 16:34:37 -08:00
AMDGPUArgumentUsageInfo.cpp
AMDGPU: Add flag to used fixed function ABI
2020-03-13 13:27:05 -07:00
AMDGPUArgumentUsageInfo.h
AMDGPU: Initial, crude support for indirect calls
2020-03-18 12:03:48 -04:00
AMDGPUAsmPrinter.cpp
AMDGPU: Initial, crude support for indirect calls
2020-03-18 12:03:48 -04:00
AMDGPUAsmPrinter.h
[AsmPrinter][MCStreamer] De-capitalize EmitInstruction and EmitCFI*
2020-02-13 22:08:55 -08:00
AMDGPUAtomicOptimizer.cpp
[AMDGPU] New llvm.amdgcn.ballot intrinsic
2020-03-31 10:35:39 +02:00
AMDGPUCallingConv.td
AMDGPU: Allow i16 shader arguments
2020-01-27 06:55:32 -08:00
AMDGPUCallLowering.cpp
[Alignment][NFC] Transition to inferAlignFromPtrInfo
2020-03-31 08:06:49 +00:00
AMDGPUCallLowering.h
[Alignment][NFC] Transition to inferAlignFromPtrInfo
2020-03-31 08:06:49 +00:00
AMDGPUCodeGenPrepare.cpp
AMDGPU: Remove denormal subtarget features
2020-04-02 17:17:12 -04:00
AMDGPUCombine.td
AMDGPU/GlobalISel: Form CVT_F32_UBYTE0
2020-03-30 17:45:55 -04:00
AMDGPUFeatures.td
AMDGPU: Remove denormal subtarget features
2020-04-02 17:17:12 -04:00
AMDGPUFixFunctionBitcasts.cpp
…
AMDGPUFrameLowering.cpp
Use Align for TFL::TransientStackAlignment
2019-10-21 08:31:25 +00:00
AMDGPUFrameLowering.h
[Alignment][NFC] Deprecate Align::None()
2020-01-24 12:53:58 +01:00
AMDGPUGenRegisterBankInfo.def
AMDGPU/GlobalISel: Fix RegBankSelect for G_INSERT_VECTOR_ELT
2020-01-22 10:57:50 -05:00
AMDGPUGISel.td
AMDGPU/GlobalISel: Form CVT_F32_UBYTE0
2020-03-30 17:45:55 -04:00
AMDGPUGlobalISelUtils.cpp
AMDGPU/GlobalISel: Select G_SHUFFLE_VECTOR
2020-02-21 13:35:40 -05:00
AMDGPUGlobalISelUtils.h
AMDGPU/GlobalISel: Start selecting image intrinsics
2020-03-30 17:33:04 -04:00
AMDGPUHSAMetadataStreamer.cpp
Make llvm::StringRef to std::string conversions explicit.
2020-01-28 23:25:25 +01:00
AMDGPUHSAMetadataStreamer.h
…
AMDGPUInline.cpp
[Inliner] Inlining should honor nobuiltin attributes
2020-02-28 07:34:14 -08:00
AMDGPUInstrInfo.cpp
[AMDGPU] Remove AMDGPURegisterInfo
2020-02-11 11:13:38 -08:00
AMDGPUInstrInfo.h
AMDGPU/GlobalISel: Change intrinsic ID for _L to _LZ opt
2020-04-01 13:03:02 -04:00
AMDGPUInstrInfo.td
AMDGPU/GlobalISel: Select llvm.amdgcn.fdot2
2020-02-21 13:35:40 -05:00
AMDGPUInstructions.td
AMDGPU: Remove denormal subtarget features
2020-04-02 17:17:12 -04:00
AMDGPUInstructionSelector.cpp
[AMDGPU] Handle SMRD signed offset immediate
2020-04-02 17:41:52 -07:00
AMDGPUInstructionSelector.h
AMDGPU/GlobalISel: Start selecting image intrinsics
2020-03-30 17:33:04 -04:00
AMDGPUISelDAGToDAG.cpp
[AMDGPU] Handle SMRD signed offset immediate
2020-04-02 17:41:52 -07:00
AMDGPUISelLowering.cpp
AMDGPU: Remove denormal subtarget features
2020-04-02 17:17:12 -04:00
AMDGPUISelLowering.h
AMDGPU/GlobalISel: Implement computeNumSignBitsForTargetInstr
2020-03-23 15:02:30 -04:00
AMDGPULegalizerInfo.cpp
AMDGPU/GlobalISel: Change intrinsic ID for _L to _LZ opt
2020-04-01 13:03:02 -04:00
AMDGPULegalizerInfo.h
AMDGPU/GlobalISel: Legalize 64-bit G_UDIV/G_UREM
2020-03-30 10:57:37 -04:00
AMDGPULibCalls.cpp
AMDGPU: Stop setting attributes based on TargetOptions
2020-03-27 13:13:43 -07:00
AMDGPULibFunc.cpp
[TypeSize] Allow returning scalable size in implicit conversion to uint64_t
2020-03-15 13:48:49 +00:00
AMDGPULibFunc.h
Make llvm::StringRef to std::string conversions explicit.
2020-01-28 23:25:25 +01:00
AMDGPULowerIntrinsics.cpp
AMDGPU: Add flag to control mem intrinsic expansion
2020-02-03 14:26:01 -08:00
AMDGPULowerKernelArguments.cpp
Remove "mask" operand from shufflevector.
2020-03-31 13:08:59 -07:00
AMDGPULowerKernelAttributes.cpp
…
AMDGPUMachineCFGStructurizer.cpp
[AMDGPU] Fixes -Wrange-loop-analysis warnings
2019-12-22 19:39:28 +01:00
AMDGPUMachineFunction.cpp
AMDGPU: Remove denormal subtarget features
2020-04-02 17:17:12 -04:00
AMDGPUMachineFunction.h
AMDGPU: Refactor treatment of denormal mode
2019-11-19 19:55:43 +05:30
AMDGPUMachineModuleInfo.cpp
…
AMDGPUMachineModuleInfo.h
…
AMDGPUMacroFusion.cpp
[AMDGPU] Extend macro fusion for ADDC and SUBB to SUBBREV
2020-03-11 17:59:21 +00:00
AMDGPUMacroFusion.h
…
AMDGPUMCInstLower.cpp
[AsmPrinter][MCStreamer] De-capitalize EmitInstruction and EmitCFI*
2020-02-13 22:08:55 -08:00
AMDGPUOpenCLEnqueuedBlockLowering.cpp
Avoid SmallString.h include in MD5.h, NFC
2020-02-26 09:10:24 -08:00
AMDGPUPerfHintAnalysis.cpp
…
AMDGPUPerfHintAnalysis.h
…
AMDGPUPostLegalizerCombiner.cpp
AMDGPU/GlobalISel: Form CVT_F32_UBYTE0
2020-03-30 17:45:55 -04:00
AMDGPUPreLegalizerCombiner.cpp
AMDGPU/GlobalISel: Introduce post-legalize combiner
2020-02-24 22:12:12 -05:00
AMDGPUPrintfRuntimeBinding.cpp
[AMDGPU] add support for hostcall buffer pointer as hidden kernel argument
2019-11-20 15:53:55 +05:30
AMDGPUPromoteAlloca.cpp
[Alignement][NFC] Deprecate untyped CreateAlignedLoad
2020-01-23 13:34:32 +01:00
AMDGPUPropagateAttributes.cpp
[AMDGPU] Propagate amdgpu-waves-per-eu to callees
2020-03-26 14:43:44 -07:00
AMDGPUPTNote.h
…
AMDGPURegisterBankInfo.cpp
[Alignment][NFC] Transitionning more getMachineMemOperand call sites
2020-03-31 08:36:18 +00:00
AMDGPURegisterBankInfo.h
AMDGPU/GlobalISel: Handle sbfe/ubfe intrinsic
2020-02-17 09:20:13 -05:00
AMDGPURegisterBanks.td
[AMDGPU] Define 16 bit VGPR subregs
2020-03-31 11:49:06 -07:00
AMDGPURewriteOutArguments.cpp
Remove "mask" operand from shufflevector.
2020-03-31 13:08:59 -07:00
AMDGPUSearchableTables.td
AMDGPU: llvm.amdgcn.writelane is a source of divergence
2020-02-12 09:12:56 +01:00
AMDGPUSubtarget.cpp
AMDGPU: Use 128-bit DS operations by default
2020-04-02 17:17:47 -04:00
AMDGPUSubtarget.h
AMDGPU: Remove denormal subtarget features
2020-04-02 17:17:12 -04:00
AMDGPUTargetMachine.cpp
Introduce unify-loop-exits pass.
2020-03-30 13:23:56 -04:00
AMDGPUTargetMachine.h
AMDGPU: Add flag to used fixed function ABI
2020-03-13 13:27:05 -07:00
AMDGPUTargetObjectFile.cpp
…
AMDGPUTargetObjectFile.h
…
AMDGPUTargetTransformInfo.cpp
AMDGPU: Remove denormal subtarget features
2020-04-02 17:17:12 -04:00
AMDGPUTargetTransformInfo.h
AMDGPU: Remove denormal subtarget features
2020-04-02 17:17:12 -04:00
AMDGPUUnifyDivergentExitNodes.cpp
[AMDGPU] Fix AMDGPUUnifyDivergentExitNodes
2020-03-18 16:49:30 +01:00
AMDGPUUnifyMetadata.cpp
[AMDGPU] Fixes -Wrange-loop-analysis warnings
2019-12-22 19:39:28 +01:00
AMDILCFGStructurizer.cpp
Sink all InitializePasses.h includes
2019-11-13 16:34:37 -08:00
AMDKernelCodeT.h
…
BUFInstructions.td
AMDGPU: Don't use separate cache arguments for s_buffer_load node
2020-01-30 14:15:26 -08:00
CaymanInstructions.td
AMDGPU/EG,CM: Implement fsqrt using recip(rsqrt(x)) instead of x * rsqrt(x)
2020-02-05 00:24:07 -05:00
CMakeLists.txt
[AMDGPU] Add SIPreEmitPeephole pass.
2020-03-25 15:35:35 +00:00
DSInstructions.td
[AMDGPU] Fix DS_WRITE_B32 patterns
2020-02-19 13:42:16 -08:00
EvergreenInstructions.td
[AMDGPU] Add ISD::FSHR -> ALIGNBIT support
2020-03-12 20:16:57 +00:00
FLATInstructions.td
AMDGPU/GlobalISel: Fix not using global atomics on gfx9+
2020-01-27 07:42:42 -08:00
GCNDPPCombine.cpp
[AMDGPU][DPP] Corrected DPP combiner
2019-11-20 15:56:45 +03:00
GCNHazardRecognizer.cpp
Make more use of MachineInstr::mayLoadOrStore.
2019-12-19 11:51:52 +00:00
GCNHazardRecognizer.h
…
GCNILPSched.cpp
Prune a LegacyDivergenceAnalysis and MachineLoopInfo include each
2019-10-19 01:31:09 +00:00
GCNIterativeScheduler.cpp
[AMDGPU] Add file headers for few files where it is missing.
2020-01-31 02:06:41 +05:30
GCNIterativeScheduler.h
[AMDGPU] Add file headers for few files where it is missing.
2020-01-31 02:06:41 +05:30
GCNMinRegStrategy.cpp
[AMDGPU] Add file headers for few files where it is missing.
2020-01-31 02:06:41 +05:30
GCNNSAReassign.cpp
AMDGPU/GFX10: Fix NSA reassign pass when operands are undef
2020-02-01 22:41:40 +01:00
GCNProcessors.td
…
GCNRegBankReassign.cpp
[AMDGPU] Stabilize sort order
2020-03-28 20:20:14 +01:00
GCNRegPressure.cpp
[AMDGPU] Fix assumption about LaneBitmask content
2020-02-19 09:07:11 -08:00
GCNRegPressure.h
Upgrade some instances of std::sort to llvm::sort. NFC.
2020-03-28 19:23:29 +01:00
GCNSchedStrategy.cpp
[AMDGPU] Remove dubious logic in bidirectional list scheduler
2020-02-28 21:35:34 +00:00
GCNSchedStrategy.h
[AMDGPU] Attempt to reschedule withou clustering
2020-01-27 10:27:16 -08:00
LLVMBuild.txt
…
MIMGInstructions.td
AMDGPU/GlobalISel: Change intrinsic ID for _L to _LZ opt
2020-04-01 13:03:02 -04:00
R600.td
…
R600AsmPrinter.cpp
[MC] Add MCStreamer::emitInt{8,16,32,64}
2020-02-29 09:40:21 -08:00
R600AsmPrinter.h
[AsmPrinter][MCStreamer] De-capitalize EmitInstruction and EmitCFI*
2020-02-13 22:08:55 -08:00
R600ClauseMergePass.cpp
…
R600ControlFlowFinalizer.cpp
[AMDGPU] Make use of divideCeil. NFC.
2020-03-26 16:11:35 +00:00
R600Defines.h
…
R600EmitClauseMarkers.cpp
…
R600ExpandSpecialInstrs.cpp
[AMDGPU] Split R600 and GCN subregs
2020-02-10 08:29:56 -08:00
R600FrameLowering.cpp
[Alignment][NFC] Transition to MachineFrameInfo::getObjectAlign()
2020-04-01 14:08:28 +00:00
R600FrameLowering.h
[Alignment][NFC] Deprecate Align::None()
2020-01-24 12:53:58 +01:00
R600InstrFormats.td
…
R600InstrInfo.cpp
Revert rG6ff1ea3244c543ad24fc99c7f4979db2f2078593 "Fix "use of uninitialized variable" static analyzer warning. NFCI."
2020-03-27 11:44:03 +00:00
R600InstrInfo.h
Use MCRegister in copyPhysReg
2019-11-11 14:42:33 +05:30
R600Instructions.td
AMDGPU: Remove denormal subtarget features
2020-04-02 17:17:12 -04:00
R600ISelLowering.cpp
AMDGPU: Move R600 test compatability hack
2020-02-10 10:02:06 -08:00
R600ISelLowering.h
…
R600MachineFunctionInfo.cpp
…
R600MachineFunctionInfo.h
…
R600MachineScheduler.cpp
…
R600MachineScheduler.h
…
R600OpenCLImageTypeLoweringPass.cpp
…
R600OptimizeVectorRegisters.cpp
…
R600Packetizer.cpp
…
R600Processors.td
…
R600RegisterInfo.cpp
[TBLGEN] Allow to override RC weight
2020-02-14 15:49:52 -08:00
R600RegisterInfo.h
[TBLGEN] Allow to override RC weight
2020-02-14 15:49:52 -08:00
R600RegisterInfo.td
[TBLGEN] Allow to override RC weight
2020-02-14 15:49:52 -08:00
R600Schedule.td
…
R700Instructions.td
…
SIAddIMGInit.cpp
[AMDGPU] Split R600 and GCN subregs
2020-02-10 08:29:56 -08:00
SIAnnotateControlFlow.cpp
AMDGPU: Fix extra type mangling on llvm.amdgcn.if.break
2020-02-03 07:02:05 -08:00
SIDefines.h
[AMDGPU] Added MI bit IsDOT
2019-09-17 17:56:13 +00:00
SIFixSGPRCopies.cpp
AMDGPU/GlobalISel: Skip DAG hack passes on selected functions
2020-02-17 08:33:17 -08:00
SIFixupVectorISel.cpp
AMDGPU/GlobalISel: Skip DAG hack passes on selected functions
2020-02-17 08:33:17 -08:00
SIFixVGPRCopies.cpp
…
SIFoldOperands.cpp
[AMDGPU] Add Scratch Wave Offset to Scratch Buffer Descriptor in entry functions
2020-03-19 15:35:16 -04:00
SIFormMemoryClauses.cpp
Sink all InitializePasses.h includes
2019-11-13 16:34:37 -08:00
SIFrameLowering.cpp
[Alignment][NFC] Transitionning more getMachineMemOperand call sites
2020-03-31 08:36:18 +00:00
SIFrameLowering.h
[AMDGPU] Add Scratch Wave Offset to Scratch Buffer Descriptor in entry functions
2020-03-19 15:35:16 -04:00
SIInsertSkips.cpp
[AMDGPU] Add SIPreEmitPeephole pass.
2020-03-25 15:35:35 +00:00
SIInsertWaitcnts.cpp
[AMDGPU] Fix vccz after v_readlane/v_readfirstlane to vcc_lo/hi
2020-01-28 10:52:17 +00:00
SIInstrFormats.td
[AMDGPU] Add a16 feature to gfx10
2020-02-10 09:04:23 +01:00
SIInstrInfo.cpp
[Alignment][NFC] Transitionning more getMachineMemOperand call sites
2020-03-31 08:36:18 +00:00
SIInstrInfo.h
Add OffsetIsScalable to getMemOperandWithOffset
2020-02-18 15:53:29 +00:00
SIInstrInfo.td
[TableGen] Support combining AssemblerPredicates with ORs
2020-03-13 17:13:51 +00:00
SIInstructions.td
AMDGPU/GlobalISel: Form CVT_F32_UBYTE0
2020-03-30 17:45:55 -04:00
SIISelLowering.cpp
[Alignment][NFC] Transitionning more getMachineMemOperand call sites
2020-03-31 08:36:18 +00:00
SIISelLowering.h
AMDGPU: Fix using wrong instruction for FP conversion
2020-03-29 14:03:07 -04:00
SILoadStoreOptimizer.cpp
[AMDGPU] Fix crash in SILoadStoreOptimizer
2020-04-02 10:26:47 -07:00
SILowerControlFlow.cpp
[AMDGPU] Fix endcf collapse
2020-03-13 13:50:21 -07:00
SILowerI1Copies.cpp
AMDGPU/GlobalISel: Skip DAG hack passes on selected functions
2020-02-17 08:33:17 -08:00
SILowerSGPRSpills.cpp
ArrayRef'ize restoreCalleeSavedRegisters. NFCI.
2020-02-29 09:50:23 +01:00
SIMachineFunctionInfo.cpp
[Alignment][NFC] Use more Align versions of various functions
2020-04-02 09:00:53 +00:00
SIMachineFunctionInfo.h
[AMDGPU] Add Scratch Wave Offset to Scratch Buffer Descriptor in entry functions
2020-03-19 15:35:16 -04:00
SIMachineScheduler.cpp
[AMDGPU] Use generated RegisterPressureSets enum
2020-02-18 10:34:03 -08:00
SIMachineScheduler.h
[AMDGPU] Use generated RegisterPressureSets enum
2020-02-18 10:34:03 -08:00
SIMemoryLegalizer.cpp
[AMDGPU] Bundle loads before post-RA scheduler
2020-01-24 11:33:38 -08:00
SIModeRegister.cpp
…
SIOptimizeExecMasking.cpp
AMDGPU: Use Register
2019-12-27 16:53:21 -05:00
SIOptimizeExecMaskingPreRA.cpp
[AMDGPU] Simplify exec copies
2020-03-12 14:54:19 -07:00
SIPeepholeSDWA.cpp
Fix unused function warning (PR44808)
2020-02-12 15:12:48 +01:00
SIPostRABundler.cpp
[AMDGPU] Drop const for value that is copied (NFC).
2020-03-30 10:59:59 +01:00
SIPreAllocateWWMRegs.cpp
Sink all InitializePasses.h includes
2019-11-13 16:34:37 -08:00
SIPreEmitPeephole.cpp
[AMDGPU] Add SIPreEmitPeephole pass.
2020-03-25 15:35:35 +00:00
SIProgramInfo.h
[AMDGPU] separate accounting for agprs
2019-10-02 00:26:58 +00:00
SIRegisterInfo.cpp
[AMDGPU] Define 16 bit VGPR subregs
2020-03-31 11:49:06 -07:00
SIRegisterInfo.h
[AMDGPU] Define 16 bit VGPR subregs
2020-03-31 11:49:06 -07:00
SIRegisterInfo.td
[AMDGPU] Define 16 bit VGPR subregs
2020-03-31 11:49:06 -07:00
SIRemoveShortExecBranches.cpp
[AMDGPU] Don't remove short branches over kills
2020-02-03 09:26:52 +00:00
SISchedule.td
[AMDGPU] Fix the gfx10 scheduling model for f32 conversions
2020-03-10 19:31:24 +00:00
SIShrinkInstructions.cpp
AMDGPU: Limit the search in finding the instruction pattern for v_swap generation.
2020-02-07 11:06:33 -08:00
SIWholeQuadMode.cpp
[AMDGPU] Fix whole wavefront mode
2020-03-17 17:23:23 +01:00
SMInstructions.td
AMDGPU/GlobalISel: Fix smrd loads of v4i64
2020-03-24 13:44:41 -04:00
SOPInstructions.td
[AMDGPU] Enable SEXT divergence driven selection.
2020-03-17 17:30:11 +03:00
VIInstrFormats.td
…
VIInstructions.td
…
VOP1Instructions.td
AMDGPU: Make use of default operands
2020-03-28 17:33:29 -04:00
VOP2Instructions.td
[AMDGPU] fixed divergence driven shift operations selection
2020-01-31 20:49:56 +03:00
VOP3Instructions.td
AMDGPU: Move towards deprecating alignbit intrinsic
2020-03-20 11:03:04 -04:00
VOP3PInstructions.td
AMDGPU: Move dot intrinsic patterns to instruction def
2020-02-21 13:35:40 -05:00
VOPCInstructions.td
AMDGPU: Remove VOP3Mods0Clamp0OMod
2020-01-07 15:10:08 -05:00
VOPInstructions.td
[AMDGPU] copy OtherPredicates from pseudo to VOP3_Real
2019-09-26 21:06:17 +00:00