e53a9d96e6
The current implementation of skip insertion (SIInsertSkip) makes it a mandatory pass required for correctness. Initially, the idea was to have an optional pass. This patch inserts the s_cbranch_execz upfront during SILowerControlFlow to skip over the sections of code when no lanes are active. Later, SIRemoveShortExecBranches removes the skips for short branches, unless there is a sideeffect and the skip branch is really necessary. This new pass will replace the handling of skip insertion in the existing SIInsertSkip Pass. Differential revision: https://reviews.llvm.org/D68092
60 lines
1.7 KiB
YAML
60 lines
1.7 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass si-insert-skips -amdgpu-skip-threshold-legacy=1 -verify-machineinstrs %s -o - | FileCheck %s
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# Make sure mandatory skips are inserted to ensure GWS ops aren't run with exec = 0
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---
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name: skip_gws_init
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body: |
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; CHECK-LABEL: name: skip_gws_init
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; CHECK: bb.0:
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; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000)
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; CHECK: SI_MASK_BRANCH %bb.2, implicit $exec
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; CHECK: S_CBRANCH_EXECZ %bb.2, implicit $exec
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; CHECK: bb.1:
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; CHECK: successors: %bb.2(0x80000000)
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; CHECK: $vgpr0 = V_MOV_B32_e32 0, implicit $exec
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; CHECK: DS_GWS_INIT $vgpr0, 0, 1, implicit $m0, implicit $exec
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; CHECK: bb.2:
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; CHECK: S_ENDPGM 0
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bb.0:
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successors: %bb.1, %bb.2
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SI_MASK_BRANCH %bb.2, implicit $exec
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bb.1:
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successors: %bb.2
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$vgpr0 = V_MOV_B32_e32 0, implicit $exec
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DS_GWS_INIT $vgpr0, 0, 1, implicit $m0, implicit $exec
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bb.2:
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S_ENDPGM 0
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...
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---
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name: skip_gws_barrier
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body: |
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; CHECK-LABEL: name: skip_gws_barrier
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; CHECK: bb.0:
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; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000)
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; CHECK: SI_MASK_BRANCH %bb.2, implicit $exec
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; CHECK: S_CBRANCH_EXECZ %bb.2, implicit $exec
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; CHECK: bb.1:
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; CHECK: successors: %bb.2(0x80000000)
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; CHECK: $vgpr0 = V_MOV_B32_e32 0, implicit $exec
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; CHECK: DS_GWS_BARRIER $vgpr0, 0, 1, implicit $m0, implicit $exec
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; CHECK: bb.2:
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; CHECK: S_ENDPGM 0
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bb.0:
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successors: %bb.1, %bb.2
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SI_MASK_BRANCH %bb.2, implicit $exec
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bb.1:
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successors: %bb.2
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$vgpr0 = V_MOV_B32_e32 0, implicit $exec
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DS_GWS_BARRIER $vgpr0, 0, 1, implicit $m0, implicit $exec
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bb.2:
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S_ENDPGM 0
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...
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