Puyan Lotfi 4b8af31f63 [llvm][MIRVRegNamer] Avoid collisions across constant pool indices. ...

When hashing on MachineOperand::MO_ConstantPoolIndex, now MIR-Canon and
MIRVRegNamer will no longer result in a hash collision.

Differential Revision: https://reviews.llvm.org/D74449

2020-03-10 01:13:20 -04:00

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addrspace-memoperands.mir

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atomic-memoperands.mir

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cfi.mir

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empty-MF.mir

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expected-target-flag-name.mir

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generic-virtual-registers-error.mir

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generic-virtual-registers-with-regbank-error.mir

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intrinsics.mir

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invalid-target-flag-name.mir

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invalid-target-memoperands.mir

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lit.local.cfg

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mir-canon-constant-pool-hash.mir

[llvm][MIRVRegNamer] Avoid collisions across constant pool indices.

2020-03-10 01:13:20 -04:00

mirCanonCopyCopyProp.mir

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mirCanonIdempotent.mir

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mirnamer.mir

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multiple-lhs-operands.mir

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namedvregs.mir

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parse-low-level-type-invalid0.mir

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parse-low-level-type-invalid1.mir

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parse-low-level-type-invalid2.mir

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parse-low-level-type-invalid3.mir

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parse-low-level-type-invalid4.mir

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parse-low-level-type-invalid5.mir

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parse-low-level-type-invalid6.mir

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parse-low-level-type-invalid7.mir

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parse-low-level-type-invalid8.mir

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parse-low-level-type-invalid9.mir

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parse-low-level-type-invalid10.mir

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parse-shufflemask-invalid0.mir

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parse-shufflemask-invalid1.mir

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parse-shufflemask-invalid2.mir

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parse-shufflemask-invalid3.mir

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parse-shufflemask.mir

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print-parse-overloaded-intrinsics.mir

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print-parse-vector-of-pointers-llt.mir

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print-parse-verify-failedISel-property.mir

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register-operand-bank.mir

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return-address-signing.mir

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stack-object-local-offset.mir

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swp.mir

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target-flags.mir

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target-memoperands.mir

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