be9fe6aa8b
Summary: load+sext/zext/fpext and (fp)trunc+store isel legalization and tests Reviewers: arsenm, craig.topper, rengolin, k-ishizaka Reviewed By: arsenm Subscribers: merge_guards_bot, wdng, hiraditya, llvm-commits Tags: #ve, #llvm Differential Revision: https://reviews.llvm.org/D73774
75 lines
1.9 KiB
LLVM
75 lines
1.9 KiB
LLVM
; RUN: llc < %s -mtriple=ve-unknown-unknown | FileCheck %s
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define void @func0(i1 signext %p, i8* %a) {
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; CHECK-LABEL: func0:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: st1b %s0, (,%s1)
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; CHECK-NEXT: or %s11, 0, %s9
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%p.conv = sext i1 %p to i8
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store i8 %p.conv, i8* %a, align 2
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ret void
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}
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define void @func1(i8 signext %p, i16* %a) {
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; CHECK-LABEL: func1:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: st2b %s0, (,%s1)
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; CHECK-NEXT: or %s11, 0, %s9
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%p.conv = sext i8 %p to i16
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store i16 %p.conv, i16* %a, align 2
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ret void
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}
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define void @func2(i8 signext %p, i32* %a) {
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; CHECK-LABEL: func2:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: stl %s0, (,%s1)
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; CHECK-NEXT: or %s11, 0, %s9
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%p.conv = sext i8 %p to i32
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store i32 %p.conv, i32* %a, align 4
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ret void
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}
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define void @func3(i8 signext %p, i64* %a) {
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; CHECK-LABEL: func3:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: adds.w.sx %s0, %s0, (0)1
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; CHECK-NEXT: st %s0, (,%s1)
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; CHECK-NEXT: or %s11, 0, %s9
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%p.conv = sext i8 %p to i64
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store i64 %p.conv, i64* %a, align 8
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ret void
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}
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define void @func5(i16 signext %p, i32* %a) {
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; CHECK-LABEL: func5:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: stl %s0, (,%s1)
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; CHECK-NEXT: or %s11, 0, %s9
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%p.conv = sext i16 %p to i32
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store i32 %p.conv, i32* %a, align 4
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ret void
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}
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define void @func6(i16 signext %p, i64* %a) {
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; CHECK-LABEL: func6:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: adds.w.sx %s0, %s0, (0)1
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; CHECK-NEXT: st %s0, (,%s1)
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; CHECK-NEXT: or %s11, 0, %s9
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%p.conv = sext i16 %p to i64
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store i64 %p.conv, i64* %a, align 8
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ret void
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}
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define void @func8(i32 %p, i64* %a) {
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; CHECK-LABEL: func8:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: adds.w.sx %s0, %s0, (0)1
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; CHECK-NEXT: st %s0, (,%s1)
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; CHECK-NEXT: or %s11, 0, %s9
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%p.conv = sext i32 %p to i64
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store i64 %p.conv, i64* %a, align 8
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ret void
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}
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