71a316883d
The initial placement of vector-combine in the opt pipeline revealed phase ordering bugs: https://bugs.llvm.org/show_bug.cgi?id=45015 https://bugs.llvm.org/show_bug.cgi?id=42022 This patch contains a few independent changes: 1. Move the pass up in the pipeline, so it happens just after loop-vectorization. This is only to keep vectorization passes together in the pipeline at the moment. I don't have evidence of interaction between these yet. 2. Add an -early-cse pass after -vector-combine to clean up redundant ops. This was partly proposed as far back as rL219644 (which is why it's effectively being moved in the old PM code). This is important because the subsequent -instcombine doesn't work as well without EarlyCSE. With the CSE, -instcombine is able to squash shuffles together in 1 of the tests (because those are simple "select" shuffles). 3. Remove the -vector-combine pass that was running after SLP. We may want to do that eventually, but I don't have a test case to support it yet. Differential Revision: https://reviews.llvm.org/D75145
110 lines
5.7 KiB
LLVM
110 lines
5.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -O3 -S -mtriple=x86_64-- -mattr=avx | FileCheck %s
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; RUN: opt -passes='default<O3>' -S < %s | FileCheck %s
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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; Ideally, this should reach the backend with 1 fsub, 1 fadd, and 1 shuffle.
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; That may require some coordination between VectorCombine, SLP, and other passes.
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; The end goal is to get a single "vaddsubps" instruction for x86 with AVX.
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define <4 x float> @PR45015(<4 x float> %arg, <4 x float> %arg1) {
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; CHECK-LABEL: @PR45015(
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; CHECK-NEXT: [[TMP1:%.*]] = fsub <4 x float> [[ARG:%.*]], [[ARG1:%.*]]
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; CHECK-NEXT: [[TMP2:%.*]] = fadd <4 x float> [[ARG]], [[ARG1]]
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; CHECK-NEXT: [[T16:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> [[TMP2]], <4 x i32> <i32 0, i32 5, i32 2, i32 7>
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; CHECK-NEXT: ret <4 x float> [[T16]]
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;
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%t = extractelement <4 x float> %arg, i32 0
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%t2 = extractelement <4 x float> %arg1, i32 0
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%t3 = fsub float %t, %t2
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%t4 = insertelement <4 x float> undef, float %t3, i32 0
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%t5 = extractelement <4 x float> %arg, i32 1
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%t6 = extractelement <4 x float> %arg1, i32 1
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%t7 = fadd float %t5, %t6
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%t8 = insertelement <4 x float> %t4, float %t7, i32 1
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%t9 = extractelement <4 x float> %arg, i32 2
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%t10 = extractelement <4 x float> %arg1, i32 2
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%t11 = fsub float %t9, %t10
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%t12 = insertelement <4 x float> %t8, float %t11, i32 2
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%t13 = extractelement <4 x float> %arg, i32 3
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%t14 = extractelement <4 x float> %arg1, i32 3
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%t15 = fadd float %t13, %t14
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%t16 = insertelement <4 x float> %t12, float %t15, i32 3
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ret <4 x float> %t16
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}
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; PR42022 - https://bugs.llvm.org/show_bug.cgi?id=42022
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%struct.Vector4 = type { float, float, float, float }
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define { <2 x float>, <2 x float> } @add_aggregate(<2 x float> %a0, <2 x float> %a1, <2 x float> %b0, <2 x float> %b1) {
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; CHECK-LABEL: @add_aggregate(
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; CHECK-NEXT: [[TMP1:%.*]] = fadd <2 x float> [[A0:%.*]], [[B0:%.*]]
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; CHECK-NEXT: [[TMP2:%.*]] = fadd <2 x float> [[A1:%.*]], [[B1:%.*]]
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; CHECK-NEXT: [[FCA_0_INSERT:%.*]] = insertvalue { <2 x float>, <2 x float> } undef, <2 x float> [[TMP1]], 0
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; CHECK-NEXT: [[FCA_1_INSERT:%.*]] = insertvalue { <2 x float>, <2 x float> } [[FCA_0_INSERT]], <2 x float> [[TMP2]], 1
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; CHECK-NEXT: ret { <2 x float>, <2 x float> } [[FCA_1_INSERT]]
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;
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%a00 = extractelement <2 x float> %a0, i32 0
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%b00 = extractelement <2 x float> %b0, i32 0
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%add = fadd float %a00, %b00
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%retval.0.0.insert = insertelement <2 x float> undef, float %add, i32 0
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%a01 = extractelement <2 x float> %a0, i32 1
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%b01 = extractelement <2 x float> %b0, i32 1
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%add4 = fadd float %a01, %b01
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%retval.0.1.insert = insertelement <2 x float> %retval.0.0.insert, float %add4, i32 1
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%a10 = extractelement <2 x float> %a1, i32 0
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%b10 = extractelement <2 x float> %b1, i32 0
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%add7 = fadd float %a10, %b10
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%retval.1.0.insert = insertelement <2 x float> undef, float %add7, i32 0
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%a11 = extractelement <2 x float> %a1, i32 1
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%b11 = extractelement <2 x float> %b1, i32 1
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%add10 = fadd float %a11, %b11
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%retval.1.1.insert = insertelement <2 x float> %retval.1.0.insert, float %add10, i32 1
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%fca.0.insert = insertvalue { <2 x float>, <2 x float> } undef, <2 x float> %retval.0.1.insert, 0
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%fca.1.insert = insertvalue { <2 x float>, <2 x float> } %fca.0.insert, <2 x float> %retval.1.1.insert, 1
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ret { <2 x float>, <2 x float> } %fca.1.insert
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}
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define void @add_aggregate_store(<2 x float> %a0, <2 x float> %a1, <2 x float> %b0, <2 x float> %b1, %struct.Vector4* nocapture dereferenceable(16) %r) {
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; CHECK-LABEL: @add_aggregate_store(
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; CHECK-NEXT: [[TMP1:%.*]] = fadd <2 x float> [[A0:%.*]], [[B0:%.*]]
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; CHECK-NEXT: [[TMP2:%.*]] = extractelement <2 x float> [[TMP1]], i32 0
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; CHECK-NEXT: [[R0:%.*]] = getelementptr inbounds [[STRUCT_VECTOR4:%.*]], %struct.Vector4* [[R:%.*]], i64 0, i32 0
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; CHECK-NEXT: store float [[TMP2]], float* [[R0]], align 4
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; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x float> [[TMP1]], i32 1
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; CHECK-NEXT: [[R1:%.*]] = getelementptr inbounds [[STRUCT_VECTOR4]], %struct.Vector4* [[R]], i64 0, i32 1
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; CHECK-NEXT: store float [[TMP3]], float* [[R1]], align 4
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; CHECK-NEXT: [[TMP4:%.*]] = fadd <2 x float> [[A1:%.*]], [[B1:%.*]]
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; CHECK-NEXT: [[TMP5:%.*]] = extractelement <2 x float> [[TMP4]], i32 0
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; CHECK-NEXT: [[R2:%.*]] = getelementptr inbounds [[STRUCT_VECTOR4]], %struct.Vector4* [[R]], i64 0, i32 2
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; CHECK-NEXT: store float [[TMP5]], float* [[R2]], align 4
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; CHECK-NEXT: [[TMP6:%.*]] = extractelement <2 x float> [[TMP4]], i32 1
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; CHECK-NEXT: [[R3:%.*]] = getelementptr inbounds [[STRUCT_VECTOR4]], %struct.Vector4* [[R]], i64 0, i32 3
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; CHECK-NEXT: store float [[TMP6]], float* [[R3]], align 4
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; CHECK-NEXT: ret void
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;
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%a00 = extractelement <2 x float> %a0, i32 0
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%b00 = extractelement <2 x float> %b0, i32 0
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%add = fadd float %a00, %b00
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%r0 = getelementptr inbounds %struct.Vector4, %struct.Vector4* %r, i64 0, i32 0
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store float %add, float* %r0, align 4
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%a01 = extractelement <2 x float> %a0, i32 1
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%b01 = extractelement <2 x float> %b0, i32 1
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%add4 = fadd float %a01, %b01
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%r1 = getelementptr inbounds %struct.Vector4, %struct.Vector4* %r, i64 0, i32 1
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store float %add4, float* %r1, align 4
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%a10 = extractelement <2 x float> %a1, i32 0
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%b10 = extractelement <2 x float> %b1, i32 0
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%add7 = fadd float %a10, %b10
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%r2 = getelementptr inbounds %struct.Vector4, %struct.Vector4* %r, i64 0, i32 2
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store float %add7, float* %r2, align 4
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%a11 = extractelement <2 x float> %a1, i32 1
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%b11 = extractelement <2 x float> %b1, i32 1
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%add10 = fadd float %a11, %b11
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%r3 = getelementptr inbounds %struct.Vector4, %struct.Vector4* %r, i64 0, i32 3
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store float %add10, float* %r3, align 4
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ret void
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}
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