Recently introduced support for converting sequential reduction loops to CFG of basic blocks in the Standard dialect makes it possible to perform a staged conversion of parallel reduction loops into a similar CFG by using sequential loops as an intermediate step. This is already the case for parallel loops without reduction, so extend the pattern to support an additional use case. Differential Revision: https://reviews.llvm.org/D75599
607 lines
23 KiB
C++
607 lines
23 KiB
C++
//===- Ops.cpp - Loop MLIR Operations -------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "mlir/Dialect/LoopOps/LoopOps.h"
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#include "mlir/Dialect/StandardOps/IR/Ops.h"
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#include "mlir/IR/AffineExpr.h"
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#include "mlir/IR/AffineMap.h"
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#include "mlir/IR/Builders.h"
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#include "mlir/IR/Function.h"
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#include "mlir/IR/Matchers.h"
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#include "mlir/IR/Module.h"
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#include "mlir/IR/OpImplementation.h"
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#include "mlir/IR/PatternMatch.h"
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#include "mlir/IR/StandardTypes.h"
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#include "mlir/IR/Value.h"
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#include "mlir/Support/MathExtras.h"
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#include "mlir/Support/STLExtras.h"
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#include "mlir/Transforms/SideEffectsInterface.h"
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using namespace mlir;
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using namespace mlir::loop;
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//===----------------------------------------------------------------------===//
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// LoopOpsDialect Interfaces
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//===----------------------------------------------------------------------===//
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namespace {
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struct LoopSideEffectsInterface : public SideEffectsDialectInterface {
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using SideEffectsDialectInterface::SideEffectsDialectInterface;
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SideEffecting isSideEffecting(Operation *op) const override {
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if (isa<IfOp>(op) || isa<ForOp>(op)) {
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return Recursive;
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}
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return SideEffectsDialectInterface::isSideEffecting(op);
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};
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};
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} // namespace
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//===----------------------------------------------------------------------===//
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// LoopOpsDialect
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//===----------------------------------------------------------------------===//
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LoopOpsDialect::LoopOpsDialect(MLIRContext *context)
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: Dialect(getDialectNamespace(), context) {
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addOperations<
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#define GET_OP_LIST
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#include "mlir/Dialect/LoopOps/LoopOps.cpp.inc"
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>();
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addInterfaces<LoopSideEffectsInterface>();
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}
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//===----------------------------------------------------------------------===//
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// ForOp
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//===----------------------------------------------------------------------===//
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void ForOp::build(Builder *builder, OperationState &result, Value lb, Value ub,
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Value step, ValueRange iterArgs) {
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result.addOperands({lb, ub, step});
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result.addOperands(iterArgs);
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for (Value v : iterArgs)
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result.addTypes(v.getType());
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Region *bodyRegion = result.addRegion();
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ForOp::ensureTerminator(*bodyRegion, *builder, result.location);
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bodyRegion->front().addArgument(builder->getIndexType());
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for (Value v : iterArgs)
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bodyRegion->front().addArgument(v.getType());
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}
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static LogicalResult verify(ForOp op) {
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if (auto cst = dyn_cast_or_null<ConstantIndexOp>(op.step().getDefiningOp()))
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if (cst.getValue() <= 0)
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return op.emitOpError("constant step operand must be positive");
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// Check that the body defines as single block argument for the induction
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// variable.
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auto *body = op.getBody();
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if (!body->getArgument(0).getType().isIndex())
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return op.emitOpError(
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"expected body first argument to be an index argument for "
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"the induction variable");
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auto opNumResults = op.getNumResults();
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if (opNumResults == 0)
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return success();
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// If ForOp defines values, check that the number and types of
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// the defined values match ForOp initial iter operands and backedge
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// basic block arguments.
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if (op.getNumIterOperands() != opNumResults)
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return op.emitOpError(
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"mismatch in number of loop-carried values and defined values");
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if (op.getNumRegionIterArgs() != opNumResults)
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return op.emitOpError(
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"mismatch in number of basic block args and defined values");
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auto iterOperands = op.getIterOperands();
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auto iterArgs = op.getRegionIterArgs();
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auto opResults = op.getResults();
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unsigned i = 0;
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for (auto e : llvm::zip(iterOperands, iterArgs, opResults)) {
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if (std::get<0>(e).getType() != std::get<2>(e).getType())
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return op.emitOpError() << "types mismatch between " << i
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<< "th iter operand and defined value";
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if (std::get<1>(e).getType() != std::get<2>(e).getType())
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return op.emitOpError() << "types mismatch between " << i
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<< "th iter region arg and defined value";
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i++;
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}
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return success();
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}
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static void print(OpAsmPrinter &p, ForOp op) {
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bool printBlockTerminators = false;
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p << op.getOperationName() << " " << op.getInductionVar() << " = "
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<< op.lowerBound() << " to " << op.upperBound() << " step " << op.step();
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if (op.hasIterOperands()) {
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p << " iter_args(";
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auto regionArgs = op.getRegionIterArgs();
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auto operands = op.getIterOperands();
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mlir::interleaveComma(llvm::zip(regionArgs, operands), p, [&](auto it) {
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p << std::get<0>(it) << " = " << std::get<1>(it);
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});
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p << ")";
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p << " -> (" << op.getResultTypes() << ")";
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printBlockTerminators = true;
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}
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p.printRegion(op.region(),
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/*printEntryBlockArgs=*/false,
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/*printBlockTerminators=*/printBlockTerminators);
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p.printOptionalAttrDict(op.getAttrs());
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}
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static ParseResult parseForOp(OpAsmParser &parser, OperationState &result) {
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auto &builder = parser.getBuilder();
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OpAsmParser::OperandType inductionVariable, lb, ub, step;
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// Parse the induction variable followed by '='.
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if (parser.parseRegionArgument(inductionVariable) || parser.parseEqual())
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return failure();
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// Parse loop bounds.
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Type indexType = builder.getIndexType();
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if (parser.parseOperand(lb) ||
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parser.resolveOperand(lb, indexType, result.operands) ||
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parser.parseKeyword("to") || parser.parseOperand(ub) ||
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parser.resolveOperand(ub, indexType, result.operands) ||
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parser.parseKeyword("step") || parser.parseOperand(step) ||
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parser.resolveOperand(step, indexType, result.operands))
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return failure();
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// Parse the optional initial iteration arguments.
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SmallVector<OpAsmParser::OperandType, 4> regionArgs, operands;
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SmallVector<Type, 4> argTypes;
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regionArgs.push_back(inductionVariable);
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if (succeeded(parser.parseOptionalKeyword("iter_args"))) {
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// Parse assignment list and results type list.
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if (parser.parseAssignmentList(regionArgs, operands) ||
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parser.parseArrowTypeList(result.types))
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return failure();
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// Resolve input operands.
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for (auto operand_type : llvm::zip(operands, result.types))
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if (parser.resolveOperand(std::get<0>(operand_type),
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std::get<1>(operand_type), result.operands))
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return failure();
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}
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// Induction variable.
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argTypes.push_back(indexType);
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// Loop carried variables
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argTypes.append(result.types.begin(), result.types.end());
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// Parse the body region.
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Region *body = result.addRegion();
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if (regionArgs.size() != argTypes.size())
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return parser.emitError(
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parser.getNameLoc(),
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"mismatch in number of loop-carried values and defined values");
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if (parser.parseRegion(*body, regionArgs, argTypes))
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return failure();
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ForOp::ensureTerminator(*body, builder, result.location);
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// Parse the optional attribute list.
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if (parser.parseOptionalAttrDict(result.attributes))
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return failure();
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return success();
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}
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Region &ForOp::getLoopBody() { return region(); }
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bool ForOp::isDefinedOutsideOfLoop(Value value) {
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return !region().isAncestor(value.getParentRegion());
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}
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LogicalResult ForOp::moveOutOfLoop(ArrayRef<Operation *> ops) {
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for (auto op : ops)
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op->moveBefore(this->getOperation());
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return success();
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}
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ForOp mlir::loop::getForInductionVarOwner(Value val) {
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auto ivArg = val.dyn_cast<BlockArgument>();
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if (!ivArg)
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return ForOp();
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assert(ivArg.getOwner() && "unlinked block argument");
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auto *containingInst = ivArg.getOwner()->getParentOp();
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return dyn_cast_or_null<ForOp>(containingInst);
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}
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//===----------------------------------------------------------------------===//
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// IfOp
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//===----------------------------------------------------------------------===//
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void IfOp::build(Builder *builder, OperationState &result, Value cond,
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bool withElseRegion) {
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result.addOperands(cond);
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Region *thenRegion = result.addRegion();
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Region *elseRegion = result.addRegion();
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IfOp::ensureTerminator(*thenRegion, *builder, result.location);
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if (withElseRegion)
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IfOp::ensureTerminator(*elseRegion, *builder, result.location);
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}
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static LogicalResult verify(IfOp op) {
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// Verify that the entry of each child region does not have arguments.
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for (auto ®ion : op.getOperation()->getRegions()) {
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if (region.empty())
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continue;
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for (auto &b : region)
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if (b.getNumArguments() != 0)
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return op.emitOpError(
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"requires that child entry blocks have no arguments");
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}
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if (op.getNumResults() != 0 && op.elseRegion().empty())
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return op.emitOpError("must have an else block if defining values");
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return success();
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}
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static ParseResult parseIfOp(OpAsmParser &parser, OperationState &result) {
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// Create the regions for 'then'.
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result.regions.reserve(2);
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Region *thenRegion = result.addRegion();
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Region *elseRegion = result.addRegion();
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auto &builder = parser.getBuilder();
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OpAsmParser::OperandType cond;
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Type i1Type = builder.getIntegerType(1);
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if (parser.parseOperand(cond) ||
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parser.resolveOperand(cond, i1Type, result.operands))
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return failure();
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// Parse optional results type list.
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if (parser.parseOptionalArrowTypeList(result.types))
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return failure();
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// Parse the 'then' region.
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if (parser.parseRegion(*thenRegion, /*arguments=*/{}, /*argTypes=*/{}))
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return failure();
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IfOp::ensureTerminator(*thenRegion, parser.getBuilder(), result.location);
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// If we find an 'else' keyword then parse the 'else' region.
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if (!parser.parseOptionalKeyword("else")) {
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if (parser.parseRegion(*elseRegion, /*arguments=*/{}, /*argTypes=*/{}))
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return failure();
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IfOp::ensureTerminator(*elseRegion, parser.getBuilder(), result.location);
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}
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// Parse the optional attribute list.
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if (parser.parseOptionalAttrDict(result.attributes))
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return failure();
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return success();
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}
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static void print(OpAsmPrinter &p, IfOp op) {
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bool printBlockTerminators = false;
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p << IfOp::getOperationName() << " " << op.condition();
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if (!op.results().empty()) {
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p << " -> (" << op.getResultTypes() << ")";
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// Print yield explicitly if the op defines values.
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printBlockTerminators = true;
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}
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p.printRegion(op.thenRegion(),
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/*printEntryBlockArgs=*/false,
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/*printBlockTerminators=*/printBlockTerminators);
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// Print the 'else' regions if it exists and has a block.
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auto &elseRegion = op.elseRegion();
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if (!elseRegion.empty()) {
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p << " else";
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p.printRegion(elseRegion,
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/*printEntryBlockArgs=*/false,
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/*printBlockTerminators=*/printBlockTerminators);
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}
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p.printOptionalAttrDict(op.getAttrs());
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}
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//===----------------------------------------------------------------------===//
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// ParallelOp
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//===----------------------------------------------------------------------===//
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void ParallelOp::build(Builder *builder, OperationState &result, ValueRange lbs,
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ValueRange ubs, ValueRange steps, ValueRange initVals) {
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result.addOperands(lbs);
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result.addOperands(ubs);
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result.addOperands(steps);
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result.addOperands(initVals);
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result.addAttribute(
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ParallelOp::getOperandSegmentSizeAttr(),
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builder->getI32VectorAttr({static_cast<int32_t>(lbs.size()),
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static_cast<int32_t>(ubs.size()),
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static_cast<int32_t>(steps.size()),
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static_cast<int32_t>(initVals.size())}));
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Region *bodyRegion = result.addRegion();
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ParallelOp::ensureTerminator(*bodyRegion, *builder, result.location);
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for (size_t i = 0, e = steps.size(); i < e; ++i)
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bodyRegion->front().addArgument(builder->getIndexType());
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for (Value init : initVals)
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result.addTypes(init.getType());
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}
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static LogicalResult verify(ParallelOp op) {
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// Check that there is at least one value in lowerBound, upperBound and step.
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// It is sufficient to test only step, because it is ensured already that the
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// number of elements in lowerBound, upperBound and step are the same.
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Operation::operand_range stepValues = op.step();
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if (stepValues.empty())
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return op.emitOpError(
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"needs at least one tuple element for lowerBound, upperBound and step");
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// Check whether all constant step values are positive.
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for (Value stepValue : stepValues)
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if (auto cst = dyn_cast_or_null<ConstantIndexOp>(stepValue.getDefiningOp()))
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if (cst.getValue() <= 0)
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return op.emitOpError("constant step operand must be positive");
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// Check that the body defines the same number of block arguments as the
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// number of tuple elements in step.
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Block *body = op.getBody();
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if (body->getNumArguments() != stepValues.size())
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return op.emitOpError()
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<< "expects the same number of induction variables: "
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<< body->getNumArguments()
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<< " as bound and step values: " << stepValues.size();
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for (auto arg : body->getArguments())
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if (!arg.getType().isIndex())
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return op.emitOpError(
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"expects arguments for the induction variable to be of index type");
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// Check that the number of results is the same as the number of ReduceOps.
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SmallVector<ReduceOp, 4> reductions(body->getOps<ReduceOp>());
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auto resultsSize = op.results().size();
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auto reductionsSize = reductions.size();
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auto initValsSize = op.initVals().size();
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if (resultsSize != reductionsSize)
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return op.emitOpError()
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<< "expects number of results: " << resultsSize
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<< " to be the same as number of reductions: " << reductionsSize;
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if (resultsSize != initValsSize)
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return op.emitOpError()
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<< "expects number of results: " << resultsSize
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<< " to be the same as number of initial values: " << initValsSize;
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// Check that the types of the results and reductions are the same.
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for (auto resultAndReduce : llvm::zip(op.results(), reductions)) {
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auto resultType = std::get<0>(resultAndReduce).getType();
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auto reduceOp = std::get<1>(resultAndReduce);
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auto reduceType = reduceOp.operand().getType();
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if (resultType != reduceType)
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return reduceOp.emitOpError()
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<< "expects type of reduce: " << reduceType
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<< " to be the same as result type: " << resultType;
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}
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return success();
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}
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static ParseResult parseParallelOp(OpAsmParser &parser,
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OperationState &result) {
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auto &builder = parser.getBuilder();
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// Parse an opening `(` followed by induction variables followed by `)`
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SmallVector<OpAsmParser::OperandType, 4> ivs;
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if (parser.parseRegionArgumentList(ivs, /*requiredOperandCount=*/-1,
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OpAsmParser::Delimiter::Paren))
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return failure();
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// Parse loop bounds.
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SmallVector<OpAsmParser::OperandType, 4> lower;
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if (parser.parseEqual() ||
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parser.parseOperandList(lower, ivs.size(),
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OpAsmParser::Delimiter::Paren) ||
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parser.resolveOperands(lower, builder.getIndexType(), result.operands))
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return failure();
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SmallVector<OpAsmParser::OperandType, 4> upper;
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if (parser.parseKeyword("to") ||
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parser.parseOperandList(upper, ivs.size(),
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OpAsmParser::Delimiter::Paren) ||
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parser.resolveOperands(upper, builder.getIndexType(), result.operands))
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return failure();
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// Parse step value.
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SmallVector<OpAsmParser::OperandType, 4> steps;
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if (parser.parseKeyword("step") ||
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parser.parseOperandList(steps, ivs.size(),
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OpAsmParser::Delimiter::Paren) ||
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parser.resolveOperands(steps, builder.getIndexType(), result.operands))
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return failure();
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// Parse step value.
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SmallVector<OpAsmParser::OperandType, 4> initVals;
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if (succeeded(parser.parseOptionalKeyword("init"))) {
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if (parser.parseOperandList(initVals, /*requiredOperandCount=*/-1,
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OpAsmParser::Delimiter::Paren))
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return failure();
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}
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// Now parse the body.
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Region *body = result.addRegion();
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SmallVector<Type, 4> types(ivs.size(), builder.getIndexType());
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if (parser.parseRegion(*body, ivs, types))
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return failure();
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// Set `operand_segment_sizes` attribute.
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result.addAttribute(
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ParallelOp::getOperandSegmentSizeAttr(),
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builder.getI32VectorAttr({static_cast<int32_t>(lower.size()),
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static_cast<int32_t>(upper.size()),
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static_cast<int32_t>(steps.size()),
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static_cast<int32_t>(initVals.size())}));
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// Parse attributes and optional results (in case there is a reduce).
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if (parser.parseOptionalAttrDict(result.attributes) ||
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parser.parseOptionalColonTypeList(result.types))
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return failure();
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if (!initVals.empty())
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parser.resolveOperands(initVals, result.types, parser.getNameLoc(),
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result.operands);
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// Add a terminator if none was parsed.
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ForOp::ensureTerminator(*body, builder, result.location);
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return success();
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}
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static void print(OpAsmPrinter &p, ParallelOp op) {
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p << op.getOperationName() << " (" << op.getBody()->getArguments() << ") = ("
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<< op.lowerBound() << ") to (" << op.upperBound() << ") step (" << op.step()
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<< ")";
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if (!op.initVals().empty())
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p << " init (" << op.initVals() << ")";
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p.printRegion(op.region(), /*printEntryBlockArgs=*/false);
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p.printOptionalAttrDict(
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op.getAttrs(), /*elidedAttrs=*/ParallelOp::getOperandSegmentSizeAttr());
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if (!op.results().empty())
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p << " : " << op.getResultTypes();
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}
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ParallelOp mlir::loop::getParallelForInductionVarOwner(Value val) {
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auto ivArg = val.dyn_cast<BlockArgument>();
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if (!ivArg)
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return ParallelOp();
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assert(ivArg.getOwner() && "unlinked block argument");
|
|
auto *containingInst = ivArg.getOwner()->getParentOp();
|
|
return dyn_cast<ParallelOp>(containingInst);
|
|
}
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
// ReduceOp
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
void ReduceOp::build(Builder *builder, OperationState &result, Value operand) {
|
|
auto type = operand.getType();
|
|
result.addOperands(operand);
|
|
Region *bodyRegion = result.addRegion();
|
|
|
|
Block *b = new Block();
|
|
b->addArguments(ArrayRef<Type>{type, type});
|
|
bodyRegion->getBlocks().insert(bodyRegion->end(), b);
|
|
}
|
|
|
|
static LogicalResult verify(ReduceOp op) {
|
|
// The region of a ReduceOp has two arguments of the same type as its operand.
|
|
auto type = op.operand().getType();
|
|
Block &block = op.reductionOperator().front();
|
|
if (block.empty())
|
|
return op.emitOpError("the block inside reduce should not be empty");
|
|
if (block.getNumArguments() != 2 ||
|
|
llvm::any_of(block.getArguments(), [&](const BlockArgument &arg) {
|
|
return arg.getType() != type;
|
|
}))
|
|
return op.emitOpError()
|
|
<< "expects two arguments to reduce block of type " << type;
|
|
|
|
// Check that the block is terminated by a ReduceReturnOp.
|
|
if (!isa<ReduceReturnOp>(block.getTerminator()))
|
|
return op.emitOpError("the block inside reduce should be terminated with a "
|
|
"'loop.reduce.return' op");
|
|
|
|
return success();
|
|
}
|
|
|
|
static ParseResult parseReduceOp(OpAsmParser &parser, OperationState &result) {
|
|
// Parse an opening `(` followed by the reduced value followed by `)`
|
|
OpAsmParser::OperandType operand;
|
|
if (parser.parseLParen() || parser.parseOperand(operand) ||
|
|
parser.parseRParen())
|
|
return failure();
|
|
|
|
// Now parse the body.
|
|
Region *body = result.addRegion();
|
|
if (parser.parseRegion(*body, /*arguments=*/{}, /*argTypes=*/{}))
|
|
return failure();
|
|
|
|
// And the type of the operand (and also what reduce computes on).
|
|
Type resultType;
|
|
if (parser.parseColonType(resultType) ||
|
|
parser.resolveOperand(operand, resultType, result.operands))
|
|
return failure();
|
|
|
|
return success();
|
|
}
|
|
|
|
static void print(OpAsmPrinter &p, ReduceOp op) {
|
|
p << op.getOperationName() << "(" << op.operand() << ") ";
|
|
p.printRegion(op.reductionOperator());
|
|
p << " : " << op.operand().getType();
|
|
}
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
// ReduceReturnOp
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
static LogicalResult verify(ReduceReturnOp op) {
|
|
// The type of the return value should be the same type as the type of the
|
|
// operand of the enclosing ReduceOp.
|
|
auto reduceOp = cast<ReduceOp>(op.getParentOp());
|
|
Type reduceType = reduceOp.operand().getType();
|
|
if (reduceType != op.result().getType())
|
|
return op.emitOpError() << "needs to have type " << reduceType
|
|
<< " (the type of the enclosing ReduceOp)";
|
|
return success();
|
|
}
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
// YieldOp
|
|
//===----------------------------------------------------------------------===//
|
|
static LogicalResult verify(YieldOp op) {
|
|
auto parentOp = op.getParentOp();
|
|
auto results = parentOp->getResults();
|
|
auto operands = op.getOperands();
|
|
|
|
if (isa<IfOp>(parentOp) || isa<ForOp>(parentOp)) {
|
|
if (parentOp->getNumResults() != op.getNumOperands())
|
|
return op.emitOpError() << "parent of yield must have same number of "
|
|
"results as the yield operands";
|
|
for (auto e : llvm::zip(results, operands)) {
|
|
if (std::get<0>(e).getType() != std::get<1>(e).getType())
|
|
return op.emitOpError()
|
|
<< "types mismatch between yield op and its parent";
|
|
}
|
|
} else if (isa<ParallelOp>(parentOp)) {
|
|
if (op.getNumOperands() != 0)
|
|
return op.emitOpError()
|
|
<< "yield inside loop.parallel is not allowed to have operands";
|
|
} else {
|
|
return op.emitOpError()
|
|
<< "yield only terminates If, For or Parallel regions";
|
|
}
|
|
|
|
return success();
|
|
}
|
|
|
|
static ParseResult parseYieldOp(OpAsmParser &parser, OperationState &result) {
|
|
SmallVector<OpAsmParser::OperandType, 4> operands;
|
|
SmallVector<Type, 4> types;
|
|
llvm::SMLoc loc = parser.getCurrentLocation();
|
|
// Parse variadic operands list, their types, and resolve operands to SSA
|
|
// values.
|
|
if (parser.parseOperandList(operands) ||
|
|
parser.parseOptionalColonTypeList(types) ||
|
|
parser.resolveOperands(operands, types, loc, result.operands))
|
|
return failure();
|
|
return success();
|
|
}
|
|
|
|
static void print(OpAsmPrinter &p, YieldOp op) {
|
|
p << op.getOperationName();
|
|
if (op.getNumOperands() != 0)
|
|
p << ' ' << op.getOperands() << " : " << op.getOperandTypes();
|
|
}
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
// TableGen'd op method definitions
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
#define GET_OP_CLASSES
|
|
#include "mlir/Dialect/LoopOps/LoopOps.cpp.inc"
|