375cec4b6c
The AMDGPU target has a convention that defined all VGPRs (execept the initial 32 argument registers) as callee-saved. This convention is not efficient always, esp. when the callee requiring more registers, ended up emitting a large number of spills, even though its caller requires only a few. This patch revises the ABI by introducing more scratch registers that a callee can freely use. The 256 vgpr registers now become: 32 argument registers 112 scratch registers and 112 callee saved registers. The scratch registers and the CSRs are intermixed at regular intervals (a split boundary of 8) to obtain a better occupancy. Reviewers: arsenm, t-tye, rampitec, b-sumner, mjbedy, tpr Reviewed By: arsenm, t-tye Differential Revision: https://reviews.llvm.org/D76356
61 lines
2.5 KiB
LLVM
61 lines
2.5 KiB
LLVM
; RUN: llc -march=amdgcn -mcpu=fiji -mattr=-flat-for-global -amdgpu-sroa=0 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCN -check-prefix=VI %s
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; RUN: llc -march=amdgcn -mcpu=hawaii -amdgpu-sroa=0 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCN -check-prefix=CI %s
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; RUN: llc -march=amdgcn -mcpu=gfx900 -mattr=-flat-for-global -amdgpu-sroa=0 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCN -check-prefix=GFX9 -check-prefix=VI %s
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; Test calls when called by other callable functions rather than
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; kernels.
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declare void @external_void_func_i32(i32) #0
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; GCN-LABEL: {{^}}test_func_call_external_void_func_i32_imm:
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; GCN: s_waitcnt
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; Spill CSR VGPR used for SGPR spilling
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; GCN: s_or_saveexec_b64 [[COPY_EXEC0:s\[[0-9]+:[0-9]+\]]], -1{{$}}
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; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s32 ; 4-byte Folded Spill
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; GCN-NEXT: s_mov_b64 exec, [[COPY_EXEC0]]
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; GCN-DAG: v_writelane_b32 v40, s33, 2
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; GCN-DAG: s_mov_b32 s33, s32
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; GCN-DAG: s_add_u32 s32, s32, 0x400
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; GCN-DAG: v_writelane_b32 v40, s30, 0
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; GCN-DAG: v_writelane_b32 v40, s31, 1
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; GCN: s_swappc_b64
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; GCN: v_readlane_b32 s4, v40, 0
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; GCN: v_readlane_b32 s5, v40, 1
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; GCN-NEXT: s_sub_u32 s32, s32, 0x400
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; GCN-NEXT: v_readlane_b32 s33, v40, 2
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; GCN: s_or_saveexec_b64 [[COPY_EXEC1:s\[[0-9]+:[0-9]+\]]], -1{{$}}
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; GCN-NEXT: buffer_load_dword v40, off, s[0:3], s32 ; 4-byte Folded Reload
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; GCN-NEXT: s_mov_b64 exec, [[COPY_EXEC1]]
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; GCN-NEXT: s_waitcnt vmcnt(0)
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; GCN-NEXT: s_setpc_b64 s[4:5]
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define void @test_func_call_external_void_func_i32_imm() #0 {
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call void @external_void_func_i32(i32 42)
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ret void
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}
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; GCN-LABEL: {{^}}test_func_call_external_void_func_i32_imm_stack_use:
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; GCN: s_waitcnt
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; GCN: s_mov_b32 s33, s32
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; GCN-DAG: s_add_u32 s32, s32, 0x1400{{$}}
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; GCN-DAG: buffer_store_dword v{{[0-9]+}}, off, s[0:3], s33 offset:
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; GCN: s_swappc_b64
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; GCN: s_sub_u32 s32, s32, 0x1400{{$}}
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; GCN: s_setpc_b64
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define void @test_func_call_external_void_func_i32_imm_stack_use() #0 {
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%alloca = alloca [16 x i32], align 4, addrspace(5)
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%gep0 = getelementptr inbounds [16 x i32], [16 x i32] addrspace(5)* %alloca, i32 0, i32 0
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%gep15 = getelementptr inbounds [16 x i32], [16 x i32] addrspace(5)* %alloca, i32 0, i32 16
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store volatile i32 0, i32 addrspace(5)* %gep0
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store volatile i32 0, i32 addrspace(5)* %gep15
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call void @external_void_func_i32(i32 42)
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ret void
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}
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attributes #0 = { nounwind }
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attributes #1 = { nounwind readnone }
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attributes #2 = { nounwind noinline }
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