0e98817458
Devices not supporting denormals can compare them true against zero. It
leads to result not matching the CTS expectation when either supporting
or not denormals.
For example for 0x1.008p-140 we get {0x1.008p-140, 0} while the CTS
expects {0x1.008p-1, -139} when supporting denormals, or {0, 0} when not
supporting denormals (flushed to zero).
Ref #129871
68 lines
2.4 KiB
C++
68 lines
2.4 KiB
C++
//===----------------------------------------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include <clc/clcmacro.h>
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#include <clc/utils.h>
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#if __CLC_FPSIZE == 32
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_CLC_OVERLOAD _CLC_DEF __CLC_GENTYPE
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__clc_frexp(__CLC_GENTYPE x, __CLC_ADDRESS_SPACE __CLC_INTN *ep) {
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__CLC_INTN i = __CLC_AS_INTN(x);
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__CLC_INTN ai = i & EXSIGNBIT_SP32;
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// Scale subnormal by 2^26 without multiplying
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__CLC_INTN is_subnormal = ai > 0 && ai < 0x00800000;
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__CLC_GENTYPE s = __CLC_AS_GENTYPE(ai | 0x0d800000) - 0x1.0p-100f;
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ai = __clc_select(ai, __CLC_AS_INTN(s), is_subnormal);
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__CLC_INTN e = (ai >> EXPSHIFTBITS_SP32) - 126 -
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__clc_select((__CLC_INTN)0, (__CLC_INTN)26, is_subnormal);
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i = (i & (__CLC_INTN)SIGNBIT_SP32) | (__CLC_INTN)HALFEXPBITS_SP32 |
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(ai & (__CLC_INTN)MANTBITS_SP32);
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__CLC_INTN is_inf_nan_or_zero =
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ai == (__CLC_INTN)0 || __clc_isinf(x) || __clc_isnan(x);
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*ep = __clc_select(e, (__CLC_INTN)0, is_inf_nan_or_zero);
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return __clc_select(__CLC_AS_GENTYPE(i), x, is_inf_nan_or_zero);
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}
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#endif
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#if __CLC_FPSIZE == 16
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_CLC_OVERLOAD _CLC_DEF __CLC_GENTYPE
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__clc_frexp(__CLC_GENTYPE x, __CLC_ADDRESS_SPACE __CLC_INTN *ep) {
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return __CLC_CONVERT_HALFN(__clc_frexp(__CLC_CONVERT_FLOATN(x), ep));
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}
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#endif
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#if __CLC_FPSIZE == 64
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_CLC_OVERLOAD _CLC_DEF __CLC_GENTYPE
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__clc_frexp(__CLC_GENTYPE x, __CLC_ADDRESS_SPACE __CLC_INTN *ep) {
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__CLC_LONGN i = __CLC_AS_LONGN(x);
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__CLC_LONGN ai = i & EXSIGNBIT_DP64;
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// Scale subnormal by 2^54 without multiplying
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__CLC_LONGN is_subnormal = ai > 0 && ai < 0x0010000000000000L;
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__CLC_GENTYPE s = __CLC_AS_GENTYPE(ai | 0x0370000000000000L) - 0x1.0p-968;
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ai = __clc_select(ai, __CLC_AS_LONGN(s), is_subnormal);
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__CLC_LONGN e = (ai >> EXPSHIFTBITS_DP64) - (__CLC_LONGN)1022 -
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__clc_select((__CLC_LONGN)0, (__CLC_LONGN)54, is_subnormal);
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i = (i & (__CLC_LONGN)SIGNBIT_DP64) | (__CLC_LONGN)HALFEXPBITS_DP64 |
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(ai & (__CLC_LONGN)MANTBITS_DP64);
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__CLC_LONGN is_inf_nan_or_zero =
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x == __CLC_FP_LIT(0.0) || __clc_isinf(x) || __clc_isnan(x);
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*ep = __CLC_CONVERT_INTN(__clc_select(e, 0L, is_inf_nan_or_zero));
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return __clc_select(__CLC_AS_GENTYPE(i), x, is_inf_nan_or_zero);
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}
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#endif
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