9b5e2b5261
Including basic fusion types around arithmetic and logical instructions. Reviewed By: jsji Differential Revision: https://reviews.llvm.org/D111693
83 lines
3.5 KiB
C++
83 lines
3.5 KiB
C++
//=== ---- PPCMacroFusion.def - PowerPC MacroFuson Candidates -v-*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https)//llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier) Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains descriptions of the macro-fusion pair for PowerPC.
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//
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//===----------------------------------------------------------------------===//
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// NOTE: NO INCLUDE GUARD DESIRED!
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#ifndef FUSION_FEATURE
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// Each FUSION_FEATURE is assigned with one TYPE, and can be enabled/disabled
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// by HAS_FEATURE. The instructions pair is fusable only when the opcode
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// of the first instruction is in OPSET1, and the second instruction opcode is
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// in OPSET2. And if DEP_OP_IDX >=0, we will check the result of first OP is
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// the operand of the second op with DEP_OP_IDX as its operand index. We assume
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// that the result of the first op is its operand zero.
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#define FUSION_FEATURE(TYPE, HAS_FEATURE, DEP_OP_IDX, OPSET1, OPSET2)
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#endif
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#ifndef FUSION_OP_SET
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#define FUSION_OP_SET(...) __VA_ARGS__
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#endif
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// Power8 User Manual Section 10.1.12, Instruction Fusion
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// {addi} followed by one of these {lxvd2x, lxvw4x, lxvdsx, lvebx, lvehx,
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// lvewx, lvx, lxsdx}
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FUSION_FEATURE(AddiLoad, hasAddiLoadFusion, 2, \
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FUSION_OP_SET(ADDI, ADDI8, ADDItocL), \
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FUSION_OP_SET(LXVD2X, LXVW4X, LXVDSX, LVEBX, LVEHX, LVEWX, \
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LVX, LXSDX))
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// {addis) followed by one of these {ld, lbz, lhz, lwz}
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FUSION_FEATURE(AddisLoad, hasAddisLoadFusion, 2, \
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FUSION_OP_SET(ADDIS, ADDIS8, ADDIStocHA8), \
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FUSION_OP_SET(LD, LBZ, LBZ8, LHZ, LHZ8, LWZ, LWZ8))
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// Power10 User Manual Section 19.1.5.4, Fusion
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// {add, mulld} - add
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FUSION_FEATURE(ArithAdd, hasArithAddFusion, -1,
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FUSION_OP_SET(ADD4, ADD8, MULLD), FUSION_OP_SET(ADD4, ADD8))
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// {add, subf} - {and, nand, nor, or}
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FUSION_FEATURE(ArithLogical, hasAddLogicalFusion, -1,
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FUSION_OP_SET(ADD4, ADD8, SUBF, SUBF8),
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FUSION_OP_SET(AND, AND8, OR, OR8, NAND, NAND8, NOR, NOR8))
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// {and, andc, eqv, nand, nor, or, orc, xor} - {add, subf}
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FUSION_FEATURE(LogicalArith, hasLogicalAddFusion, -1,
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FUSION_OP_SET(AND, ANDC, EQV, NAND, NOR, OR, ORC, XOR, AND8,
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ANDC8, EQV8, NAND8, NOR8, OR8, ORC8, XOR8),
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FUSION_OP_SET(ADD4, ADD8, SUBF, SUBF8))
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// Either of {and, andc, eqv, nand, nor, or, orc, xor}
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FUSION_FEATURE(Logical, hasLogicalFusion, -1,
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FUSION_OP_SET(AND, ANDC, EQV, NAND, NOR, OR, ORC, XOR, AND8,
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ANDC8, EQV8, NAND8, NOR8, OR8, ORC8, XOR8),
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FUSION_OP_SET(AND, ANDC, EQV, NAND, NOR, OR, ORC, XOR, AND8,
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ANDC8, EQV8, NAND8, NOR8, OR8, ORC8, XOR8))
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// vaddudm - vaddudm
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FUSION_FEATURE(VecAdd, hasArithAddFusion, -1, FUSION_OP_SET(VADDUDM),
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FUSION_OP_SET(VADDUDM))
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// Either of {vand, vandc, veqv, vnand, vnor, vor, vorc, vxor}
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FUSION_FEATURE(VecLogical, hasLogicalFusion, -1,
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FUSION_OP_SET(VAND, VANDC, VEQV, VNAND, VNOR, VOR, VORC, VXOR),
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FUSION_OP_SET(VAND, VANDC, VEQV, VNAND, VNOR, VOR, VORC, VXOR))
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// sldi rx, ra, {3, 6} - {add, subf}
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// sldi rx, ra n is alias of rldicr rx, ra, n, 63-n
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FUSION_FEATURE(SldiAdd, hasArithAddFusion, -1, FUSION_OP_SET(RLDICR, RLDICR_32),
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FUSION_OP_SET(ADD4, ADD8, SUBF, SUBF8))
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#undef FUSION_FEATURE
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#undef FUSION_OP_SET
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