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b20da5117fb66e7f9bcb56cb14af86dcafe2ee9a
clang-p2996/llvm/test/Transforms/LoopVectorize
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David Green 309f1e4ac8 [ARM] Add datalayout to costmodel tests. NFC 
This adds a sensible datalayout to the ARM cost model tests, to prevent
the costs reported being incorrect for the size of pointers.
2021-11-16 09:49:42 +00:00
..
AArch64
[AArch64][SVE] Remove i1 type from isElementTypeLegalForScalableVector
2021-11-12 14:24:38 +00:00
AMDGPU
[LV] Update more target-specific tests after 23c2f2e6b2.
2021-06-07 12:13:21 +01:00
ARM
[ARM] Add datalayout to costmodel tests. NFC
2021-11-16 09:49:42 +00:00
Hexagon
[LV] Fix crash when computing max VF too early
2021-02-01 12:14:59 +00:00
PowerPC
[LoopVectorize] Add PR41179 test case
2021-11-14 21:54:23 +00:00
RISCV
[LV] Update test that was missed in e844f05397.
2021-10-18 18:23:00 +01:00
SystemZ
Revert "[LoopVectorize] Extract the last lane from a uniform store"
2021-11-10 11:21:19 +00:00
VE
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X86
[runtime-unroll] Use incrementing IVs instead of decrementing ones
2021-11-12 15:44:58 -08:00
XCore
…
12-12-11-if-conv.ll
…
2012-10-20-infloop.ll
…
2012-10-22-isconsec.ll
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2016-07-27-loop-vec.ll
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alias-set-with-uncomputable-bounds.ll
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align.ll
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assume.ll
[LoopVectorize] Improve vectorisation of some intrinsics by treating them as uniform
2021-08-06 10:13:15 +01:00
bsd_regex.ll
…
bzip_reverse_loops.ll
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calloc.ll
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cast-induction.ll
…
check-prof-info.ll
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conditional-assignment.ll
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consec_no_gep.ll
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consecutive-ptr-uniforms.ll
Revert rG1c9bec727ab5c53fa060560dc8d346a911142170 : [InstCombine] Fold (gep (oneuse(gep Ptr, Idx0)), Idx1) -> (gep Ptr, (add Idx0, Idx1)) (PR51069)
2021-08-23 21:09:26 +01:00
control-flow.ll
…
cpp-new-array.ll
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dbg.value.ll
…
dead_instructions.ll
[LV] Mark increment of main vector loop induction variable as NUW.
2021-06-07 10:47:52 +01:00
debugloc.ll
[LV] Mark increment of main vector loop induction variable as NUW.
2021-06-07 10:47:52 +01:00
demanded-bits-of-pointer-instruction.ll
…
diag-missing-instr-debug-loc.ll
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
2021-05-24 19:43:40 +02:00
diag-with-hotness-info-2.ll
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
2021-05-24 19:43:40 +02:00
diag-with-hotness-info.ll
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
2021-05-24 19:43:40 +02:00
disable_nonforced_enable.ll
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disable_nonforced.ll
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discriminator.ll
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dont-fold-tail-for-const-TC.ll
[LV] Mark increment of main vector loop induction variable as NUW.
2021-06-07 10:47:52 +01:00
dont-fold-tail-for-divisible-TC.ll
[LV] Mark increment of main vector loop induction variable as NUW.
2021-06-07 10:47:52 +01:00
ee-crash.ll
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exact.ll
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explicit_outer_detection.ll
[LV] Consider Loop Unroll Hints When Making Interleave Decisions
2021-04-28 17:27:52 -04:00
explicit_outer_nonuniform_inner.ll
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explicit_outer_uniform_diverg_branch.ll
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extract-last-veclane.ll
[SVE][LoopVectorize] Add support for extracting the last lane of a scalable vector
2021-03-05 09:57:56 +00:00
fcmp-vectorize.ll
[LV] Mark increment of main vector loop induction variable as NUW.
2021-06-07 10:47:52 +01:00
first-order-recurrence-complex.ll
Revert rest of IRBuilderBase's short-circuiting folds
2021-10-28 02:15:14 +03:00
first-order-recurrence-multiply-recurrences.ll
…
first-order-recurrence-sink-replicate-region.ll
[VPlan] Print live-in backedge taken count as part of plan.
2021-10-11 20:13:01 +01:00
first-order-recurrence.ll
Revert "[IR] IRBuilderBase::CreateAdd(): short-circuit x + 0 --> x"
2021-10-27 22:21:37 +03:00
fix-reduction-dbg.ll
[Vectorizers][TTI] remove option to bypass creation of vector reduction intrinsics
2021-02-12 08:13:50 -05:00
flags.ll
[Vectorizers][TTI] remove option to bypass creation of vector reduction intrinsics
2021-02-12 08:13:50 -05:00
float-induction.ll
[VPlan] Support sinking recipes with uniform users outside sink target.
2021-09-15 09:21:39 +01:00
float-minmax-instruction-flag.ll
Revert "[NFC] IRBuilderBase::CreateAdd(): place constant onto RHS"
2021-10-27 22:21:37 +03:00
float-reduction.ll
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fneg.ll
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followup.ll
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funcall.ll
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gcc-examples.ll
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gep_with_bitcast.ll
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global_alias.ll
[opt] Directly translate -O# to -passes='default<O#>'
2021-10-18 16:48:10 -07:00
hints-trans.ll
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hoist-loads.ll
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i8-induction.ll
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icmp-uniforms.ll
[VPlan] Include name when printing after 93a9d2de8f.
2021-03-23 09:50:14 +00:00
if-conv-crash.ll
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if-conversion-edgemasks.ll
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if-conversion-nest.ll
[LV] Mark increment of main vector loop induction variable as NUW.
2021-06-07 10:47:52 +01:00
if-conversion-reduction.ll
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if-conversion.ll
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if-pred-non-void.ll
[VPlan] Merge predicated-triangle regions, after sinking.
2021-06-28 11:10:38 +01:00
if-pred-not-when-safe.ll
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if-pred-stores.ll
Revert "[NFC] IRBuilderBase::CreateAdd(): place constant onto RHS"
2021-10-27 22:21:37 +03:00
if-reduction.ll
[LoopVectorize] Fix VPRecipeBuilder::createEdgeMask to correctly generate the mask
2021-02-14 21:12:34 +09:00
incorrect-dom-info.ll
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
2021-05-24 19:43:40 +02:00
increment.ll
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induction_plus.ll
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induction-step.ll
Revert "[NFC] IRBuilderBase::CreateAdd(): place constant onto RHS"
2021-10-27 22:21:37 +03:00
induction.ll
[LV] Move optimized IV recipes to phi section of header after sinking.
2021-11-10 11:41:08 +00:00
infiniteloop.ll
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int_sideeffect.ll
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interleaved-accesses-1.ll
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interleaved-accesses-2.ll
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interleaved-accesses-3.ll
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interleaved-accesses-alias.ll
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interleaved-accesses-masked-group.ll
[LV] Support Interleaved Store Group With Gaps
2021-08-08 10:32:02 +03:00
interleaved-accesses-pred-stores.ll
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interleaved-accesses-uniform-load.ll
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interleaved-accesses.ll
Revert rG1c9bec727ab5c53fa060560dc8d346a911142170 : [InstCombine] Fold (gep (oneuse(gep Ptr, Idx0)), Idx1) -> (gep Ptr, (add Idx0, Idx1)) (PR51069)
2021-08-23 21:09:26 +01:00
interleaved-acess-with-remarks.ll
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intrinsic.ll
Update @llvm.powi to handle different int sizes for the exponent
2021-06-17 09:38:28 +02:00
invariant-store-vectorization-2.ll
[LoopUtils] Fix incorrect RT check bounds of loop-invariant mem accesses
2021-07-19 19:38:24 +08:00
invariant-store-vectorization.ll
[LV] Re-generate check lines of some fragile tests (NFC)
2021-07-19 19:38:24 +08:00
irregular_type.ll
[LoopVectorize] Refine hasIrregularType predicate
2021-03-17 17:03:47 +01:00
iv_outside_user.ll
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lcssa-crash.ll
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libcall-remark.ll
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lifetime.ll
[NFC] Remove redundant test in Transforms/LoopVectorize/lifetime.ll
2021-08-05 14:39:08 +01:00
loop-form.ll
[test] refresh a couple of autogen tests
2021-10-05 18:41:24 -07:00
loop-legality-checks.ll
[LV] Enable vectorization of multiple exit loops w/computable exit counts
2021-07-15 08:53:51 -07:00
loop-scalars.ll
[LV] Mark increment of main vector loop induction variable as NUW.
2021-06-07 10:47:52 +01:00
loop-vect-memdep.ll
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loop-vect-option.ll
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memdep-fold-tail.ll
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memdep.ll
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metadata-unroll.ll
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metadata-width.ll
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
2021-05-24 19:43:40 +02:00
metadata.ll
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middle-block-dbg.ll
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miniters.ll
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minmax_reduction.ll
[LV] Recognize intrinsic min/max reductions
2021-09-15 10:45:50 +01:00
mixed-precision-remarks.ll
[LV] Add analysis remark for mixed precision conversions
2021-02-17 21:37:08 -05:00
multi-use-reduction-bug.ll
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multiple-address-spaces.ll
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
2021-05-24 19:43:40 +02:00
multiple-exits-versioning.ll
[LV] Add test cases with multiple exits which require versioning.
2021-01-20 11:48:48 +00:00
multiple-strides-vectorization.ll
[LoopUtils] Simplify addRuntimeCheck to return a single value.
2021-10-18 18:03:09 +01:00
no_array_bounds_scalable.ll
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no_array_bounds.ll
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no_idiv_reduction.ll
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no_int_induction.ll
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no_outside_user.ll
[LoopUtils] Simplify addRuntimeCheck to return a single value.
2021-10-18 18:03:09 +01:00
no_switch_disable_vectorization.ll
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no_switch.ll
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no-interleave-up-front.ll
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noalias-md-licm.ll
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noalias-md.ll
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noalias-scope-decl.ll
[noalias.decl] Look through llvm.experimental.noalias.scope.decl
2021-01-19 20:09:42 +01:00
nofloat-report.ll
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nofloat.ll
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non-const-n.ll
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nontemporal.ll
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nounroll.ll
Follow up of rGddb3b26a1269: added 'requires asserts' to test case.
2021-04-29 08:34:24 +01:00
novect-lcssa-cfg-invalidation.ll
[MemorySSA] Remove unnecessary MSSA dependencies
2021-08-16 20:40:55 +02:00
nsw-crash.ll
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nuw.ll
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opaque-ptr.ll
[OpaquePtr] Forbid mixing typed and opaque pointers
2021-09-10 15:18:23 +02:00
opt.ll
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optimal-epilog-vectorization-limitations.ll
[LV] Legalize scalable VF hints
2021-01-08 10:49:44 +00:00
optimal-epilog-vectorization-liveout.ll
[LV] Mark increment of main vector loop induction variable as NUW.
2021-06-07 10:47:52 +01:00
optimal-epilog-vectorization-scalable.ll
[LoopVectorize] Permit fixed-width epilogue loops for scalable vector bodies
2021-11-08 09:41:13 +00:00
optimal-epilog-vectorization.ll
Revert rest of IRBuilderBase's short-circuiting folds
2021-10-28 02:15:14 +03:00
optsize.ll
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outer_loop_test1.ll
[LV] Mark increment of main vector loop induction variable as NUW.
2021-06-07 10:47:52 +01:00
outer_loop_test2.ll
[LV] Mark increment of main vector loop induction variable as NUW.
2021-06-07 10:47:52 +01:00
outer-loop-vec-phi-predecessor-order.ll
[LV] Mark increment of main vector loop induction variable as NUW.
2021-06-07 10:47:52 +01:00
partial-lcssa.ll
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phi-cost.ll
[LV] Mark increment of main vector loop induction variable as NUW.
2021-06-07 10:47:52 +01:00
phi-hang.ll
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pointer-induction.ll
Revert "[IR] IRBuilderBase::CreateAdd(): short-circuit x + 0 --> x"
2021-10-27 22:21:37 +03:00
pr25281.ll
[Tests] Fix incorrect noalias metadata
2021-09-18 20:51:00 +02:00
pr28541.ll
…
pr30654-phiscev-sext-trunc.ll
Revert rest of IRBuilderBase's short-circuiting folds
2021-10-28 02:15:14 +03:00
pr30806-phi-scev.ll
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pr30806.ll
…
pr31098.ll
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pr31190.ll
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pr32859.ll
…
pr33706.ll
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pr34681.ll
[test, LoopVectorize] Fix use of var defined in CHECK-NOT
2021-04-09 10:01:57 +01:00
pr35743.ll
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pr35773.ll
[LV] Mark increment of main vector loop induction variable as NUW.
2021-06-07 10:47:52 +01:00
pr36311.ll
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pr36983.ll
…
pr37248.ll
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pr37515.ll
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pr38697.ll
[SCEV] Properly guard reasoning about infinite loops being UB on mustprogress
2021-06-07 14:47:36 -07:00
pr38800.ll
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pr39099.ll
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pr39417-optsize-scevchecks.ll
[LV] Mark increment of main vector loop induction variable as NUW.
2021-06-07 10:47:52 +01:00
pr43166-fold-tail-by-masking.ll
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pr44488-predication.ll
Revert "[LoopVectorize] Extract the last lane from a uniform store"
2021-11-10 11:21:19 +00:00
pr45259.ll
Revert rest of IRBuilderBase's short-circuiting folds
2021-10-28 02:15:14 +03:00
pr45525.ll
…
pr45679-fold-tail-by-masking.ll
Revert "[IR] IRBuilderBase::CreateAdd(): short-circuit x + 0 --> x"
2021-10-27 22:21:37 +03:00
pr46525-expander-insertpoint.ll
[VPlan] Keep induction recipes in header.
2021-10-28 18:22:05 +01:00
pr47343-expander-lcssa-after-cfg-update.ll
Revert "[LoopVectorize] Extract the last lane from a uniform store"
2021-11-10 11:21:19 +00:00
pr48832.ll
[LoopVectorize] Fix VPRecipeBuilder::createEdgeMask to correctly generate the mask
2021-02-14 21:12:34 +09:00
pr50686.ll
[LoopUtils] Simplify addRuntimeCheck to return a single value.
2021-10-18 18:03:09 +01:00
pr51614-fold-tail-by-masking.ll
[LV] Fix crash for reverse interleaved loads with gap under fold-tail.
2021-09-21 20:13:32 +03:00
preserve-dbg-loc-and-loop-metadata.ll
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ptr_loops.ll
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ptr-induction.ll
[LV] Mark increment of main vector loop induction variable as NUW.
2021-06-07 10:47:52 +01:00
read-only.ll
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reduction-inloop-pred.ll
[LoopVectorize] Propagate fast-math flags for inloop reductions
2021-11-02 08:59:53 +00:00
reduction-inloop-uf4.ll
[LV] Mark increment of main vector loop induction variable as NUW.
2021-06-07 10:47:52 +01:00
reduction-inloop.ll
[LoopVectorize] Propagate fast-math flags for inloop reductions
2021-11-02 08:59:53 +00:00
reduction-order.ll
Update reduction test. Remove standalone test file
2021-07-27 12:35:04 -04:00
reduction-predselect.ll
[VPlan] Merge predicated-triangle regions, after sinking.
2021-06-28 11:10:38 +01:00
reduction-ptr.ll
[Analysis][LoopVectorize] do not form reductions of pointers
2021-02-19 14:01:57 -05:00
reduction-small-size.ll
[IVDescriptor] Make sure the sign is included for negative extension.
2021-11-15 13:12:57 +00:00
reduction.ll
[VPlan] Register recipe for instr if the simplified value is recipe.
2021-05-11 14:32:34 +01:00
remarks-multi-exit-loops.ll
[LV] Enable vectorization of multiple exit loops w/computable exit counts
2021-07-15 08:53:51 -07:00
remove_metadata.ll
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reverse_induction.ll
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reverse_iter.ll
…
runtime-check-address-space.ll
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
2021-05-24 19:43:40 +02:00
runtime-check-needed-but-empty.ll
[VPlan] Keep induction recipes in header.
2021-10-28 18:22:05 +01:00
runtime-check-pointer-element-type.ll
…
runtime-check-readonly-address-space.ll
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
2021-05-24 19:43:40 +02:00
runtime-check-readonly.ll
…
runtime-check-small-clamped-bounds.ll
Revert rest of IRBuilderBase's short-circuiting folds
2021-10-28 02:15:14 +03:00
runtime-check.ll
[LV] Mark increment of main vector loop induction variable as NUW.
2021-06-07 10:47:52 +01:00
runtime-drop-crash.ll
[LV] Generate RT checks up-front and remove them if required.
2021-03-01 10:48:04 +00:00
safegep.ll
…
same-base-access.ll
…
scalable-assume.ll
[LoopVectorize] Improve vectorisation of some intrinsics by treating them as uniform
2021-08-06 10:13:15 +01:00
scalable-first-order-recurrence.ll
[IR] Let ConstantVector::getSplat use poison instead of undef
2021-08-10 08:27:43 +01:00
scalable-inductions.ll
[IR] In ConstantFoldShuffleVectorInstruction use zeroinitializer for splats of 0
2021-11-10 09:42:58 +00:00
scalable-lifetime.ll
[LoopVectorize] Improve vectorisation of some intrinsics by treating them as uniform
2021-08-06 10:13:15 +01:00
scalable-loop-unpredicated-body-scalar-tail.ll
[LV] Mark increment of main vector loop induction variable as NUW.
2021-06-07 10:47:52 +01:00
scalable-noalias-scope-decl.ll
[LoopVectorize] Improve vectorisation of some intrinsics by treating them as uniform
2021-08-06 10:13:15 +01:00
scalable-reduction-inloop.ll
[IR] In ConstantFoldShuffleVectorInstruction use zeroinitializer for splats of 0
2021-11-10 09:42:58 +00:00
scalable-trunc-min-bitwidth.ll
[SVE] Fix ShuffleVector cast<FixedVectorType> in truncateToMinimalBitwidths
2021-07-07 15:30:10 +01:00
scalable-vf-hint.ll
[LoopVectorize] Don't emit remarks about lack of scalable vectors unless they're specifically requested.
2021-08-15 12:15:52 +01:00
scalar_after_vectorization.ll
Revert "[NFC] IRBuilderBase::CreateAdd(): place constant onto RHS"
2021-10-27 22:21:37 +03:00
scalar-select.ll
…
scalarized-bitcast.ll
[LoopVectorize] Simplify scalar cost calculation in getInstructionCost
2021-04-28 13:41:07 +01:00
scev-during-mutation.ll
[LV] Workaround PR49900 (a crash due to analyzing partially mutated IR)
2021-05-05 09:56:28 -07:00
scev-exitlim-crash.ll
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
2021-05-24 19:43:40 +02:00
select-cmp-predicated.ll
Revert "[IR] IRBuilderBase::CreateAdd(): short-circuit x + 0 --> x"
2021-10-27 22:21:37 +03:00
select-cmp.ll
[LoopVectorize] Permit vectorisation of more select(cmp(), X, Y) reduction patterns
2021-10-11 09:41:38 +01:00
select-reduction.ll
[Vectorizers][TTI] remove option to bypass creation of vector reduction intrinsics
2021-02-12 08:13:50 -05:00
simple-unroll.ll
…
single-value-blend-phis.ll
[LV] Mark increment of main vector loop induction variable as NUW.
2021-06-07 10:47:52 +01:00
skeleton-lcssa-crash.ll
Revert "[LoopVectorize] Extract the last lane from a uniform store"
2021-11-10 11:21:19 +00:00
skip-iterations.ll
…
small-loop.ll
…
start-non-zero.ll
…
store-shuffle-bug.ll
…
struct_access.ll
…
tail-folding-counting-down.ll
…
tail-folding-vectorization-factor-1.ll
Revert "[IR] IRBuilderBase::CreateAdd(): short-circuit x + 0 --> x"
2021-10-27 22:21:37 +03:00
tbaa-nodep.ll
…
tripcount.ll
…
trunc-reductions.ll
Reland "[LV] Use lookThroughAnd with logical reductions"
2021-07-30 18:04:09 +01:00
undef-inst-bug.ll
…
uniform-blend.ll
[LV] Mark increment of main vector loop induction variable as NUW.
2021-06-07 10:47:52 +01:00
unroll_nonlatch.ll
Revert "[IR] IRBuilderBase::CreateAdd(): short-circuit x + 0 --> x"
2021-10-27 22:21:37 +03:00
unroll_novec.ll
[LV] Mark increment of main vector loop induction variable as NUW.
2021-06-07 10:47:52 +01:00
unroll-novec-memcheck-metadata.ll
…
unroll.ll
…
unsafe-dep-remark.ll
…
unsafe-vf-hint-remark.ll
…
unsized-pointee-crash.ll
…
use-scalar-epilogue-if-tp-fails.ll
Revert "[IR] IRBuilderBase::CreateAdd(): short-circuit x + 0 --> x"
2021-10-27 22:21:37 +03:00
value-ptr-bug.ll
…
vect-phiscev-sext-trunc.ll
…
vect.omp.persistence.ll
…
vect.stats.ll
…
vector-geps.ll
[LV] Mark increment of main vector loop induction variable as NUW.
2021-06-07 10:47:52 +01:00
vector-intrinsic-call-cost.ll
[LV] Mark increment of main vector loop induction variable as NUW.
2021-06-07 10:47:52 +01:00
vectorize-once.ll
…
vectorize-pointer-phis.ll
Recommit "[LAA] Support pointer phis in loop by analyzing each incoming pointer."
2021-09-14 11:19:12 +01:00
vectorizeVFone.ll
…
version-mem-access.ll
…
vplan_hcfg_stress_test.ll
…
vplan-dot-printing.ll
[VPlan] Add plain text (not DOT's digraph) dumps
2021-03-19 10:50:12 -07:00
vplan-outer-loop-uncomputable-trip-count.ll
…
vplan-printing.ll
[VPlan] Replace hard-coded VPValue ids with patterns in tests.
2021-10-07 09:52:01 +01:00
vplan-sink-scalars-and-merge-vf1.ll
[VPlan] Do not sink uniform recipes in sinkScalarOperands.
2021-05-27 14:07:48 +01:00
vplan-sink-scalars-and-merge.ll
[VPlan] Print live-in backedge taken count as part of plan.
2021-10-11 20:13:01 +01:00
vplan-stress-test-no-explict-vf.ll
…
vplan-vectorize-inner-loop-reduction.ll
[LV] Mark increment of main vector loop induction variable as NUW.
2021-06-07 10:47:52 +01:00
vplan-widen-call-instruction.ll
[LV] Mark increment of main vector loop induction variable as NUW.
2021-06-07 10:47:52 +01:00
vplan-widen-select-instruction.ll
[VPlan] Support to widen select intructions in VPlan native path
2021-03-10 20:59:53 +00:00
write-only.ll
…
zero-sized-pointee-crash.ll
…