cad9f98a2a
This metadata was intended to mark all accesses within an iteration to be pairwise non-aliasing, in this case because every memory of a base pointer is touched (read or write) at most once. This is typical for 'sweeps' over all data. The stated motivation from D30606 is to ensure that unrolled iterations are considered non-aliasing. Rhe implemention had multiple issues: * The structure of the noalias metadata was malformed. D110026 added check in the verifier for this metadata, and the tests were failing since then. * This is not true for the outer loops of the BLIS matrix multiplication, where it was being inserted. Each element of A, B, C is accessed multiple times, as often as the loop not used as an index is iterating. * Scopes were added to SecondLevelOtherAliasScopeList (used for the !noalias scop list) on-the-fly when another SCEV was seen. This meant that previously visited instructions would not be updated with alias scopes that are only seen later, missing out those SCEVs they should not be aliasing with. * Since the !noalias scope list would ideally consists of all other SCEV for this base pointer, we might run quickly into scalability issues. Especially after unrolling there would probably at least once SCEV per instruction and unroll instance. * The inter-iteration noalias base pointer was not removed after leaving the loop marked with it, effectively marking everything after it to noalias as well. A solution I considered was to mark each instruction as non-aliasing with its own scope. The instruction itself would obviously alias itself, but such construction might also be considered invalid. Duplicating the instruction (e.g. due to speculation) would mark the instruction non-aliasing with its clone. I don't want to go into this territory, especially since the original motivation of determining unrolled instances as noalias based on SCEV is the what scev-aa does as well. This effectively reverts D30606 and D35761.
135 lines
7.4 KiB
LLVM
135 lines
7.4 KiB
LLVM
; RUN: opt %loadPolly -polly-opt-isl -polly-pattern-matching-based-opts=true \
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; RUN: -polly-target-throughput-vector-fma=1 \
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; RUN: -polly-target-latency-vector-fma=8 \
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; RUN: -polly-target-1st-cache-level-associativity=8 \
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; RUN: -polly-target-2nd-cache-level-associativity=8 \
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; RUN: -polly-target-1st-cache-level-size=32768 \
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; RUN: -polly-target-2nd-cache-level-size=262144 -polly-ast \
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; RUN: -polly-target-vector-register-bitwidth=256 \
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; RUN: -analyze < %s | FileCheck %s
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;
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; /* C := alpha*A*B + beta*C */
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; /* _PB_NK % Kc != 0 */
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; for (i = 0; i < _PB_NI; i++)
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; for (j = 0; j < _PB_NJ; j++)
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; {
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; C[i][j] *= beta;
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; for (k = 0; k < _PB_NK; ++k)
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; C[i][j] += alpha * A[i][k] * B[k][j];
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; }
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;
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; CHECK-LABEL: Printing analysis 'Polly - Generate an AST from the SCoP (isl)' for region: 'bb8 => bb32' in function 'kernel_gemm':
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; CHECK: {
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; CHECK-NEXT: // 1st level tiling - Tiles
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; CHECK-NEXT: for (int c0 = 0; c0 <= 32; c0 += 1)
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; CHECK-NEXT: for (int c1 = 0; c1 <= 32; c1 += 1) {
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; CHECK-NEXT: // 1st level tiling - Points
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; CHECK-NEXT: for (int c2 = 0; c2 <= 31; c2 += 1)
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; CHECK-NEXT: for (int c3 = 0; c3 <= 31; c3 += 1)
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; CHECK-NEXT: Stmt_bb9(32 * c0 + c2, 32 * c1 + c3);
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; CHECK-NEXT: }
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; CHECK-NEXT: // 1st level tiling - Tiles
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; CHECK-NEXT: for (int c1 = 0; c1 <= 3; c1 += 1) {
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; CHECK-NEXT: for (int c3 = 0; c3 <= 1055; c3 += 1)
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; CHECK-NEXT: for (int c4 = 256 * c1; c4 <= min(1022, 256 * c1 + 255); c4 += 1)
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; CHECK-NEXT: CopyStmt_0(0, c3, c4);
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; CHECK-NEXT: for (int c2 = 0; c2 <= 10; c2 += 1) {
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; CHECK-NEXT: for (int c6 = 96 * c2; c6 <= 96 * c2 + 95; c6 += 1)
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; CHECK-NEXT: for (int c7 = 256 * c1; c7 <= min(1022, 256 * c1 + 255); c7 += 1)
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; CHECK-NEXT: CopyStmt_1(0, c1, c2, c6, c7);
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; CHECK-NEXT: // 1st level tiling - Points
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; CHECK-NEXT: // Register tiling - Tiles
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; CHECK-NEXT: for (int c3 = 0; c3 <= 131; c3 += 1)
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; CHECK-NEXT: for (int c4 = 0; c4 <= 23; c4 += 1)
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; CHECK-NEXT: for (int c5 = 0; c5 <= min(255, -256 * c1 + 1022); c5 += 1) {
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; CHECK-NEXT: // Loop Vectorizer Disabled
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; CHECK-NEXT: // Register tiling - Points
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; CHECK-NEXT: {
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; CHECK-NEXT: Stmt_Copy_0(96 * c2 + 4 * c4, 8 * c3, 256 * c1 + c5);
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; CHECK-NEXT: Stmt_Copy_0(96 * c2 + 4 * c4, 8 * c3 + 1, 256 * c1 + c5);
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; CHECK-NEXT: Stmt_Copy_0(96 * c2 + 4 * c4, 8 * c3 + 2, 256 * c1 + c5);
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; CHECK-NEXT: Stmt_Copy_0(96 * c2 + 4 * c4, 8 * c3 + 3, 256 * c1 + c5);
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; CHECK-NEXT: Stmt_Copy_0(96 * c2 + 4 * c4, 8 * c3 + 4, 256 * c1 + c5);
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; CHECK-NEXT: Stmt_Copy_0(96 * c2 + 4 * c4, 8 * c3 + 5, 256 * c1 + c5);
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; CHECK-NEXT: Stmt_Copy_0(96 * c2 + 4 * c4, 8 * c3 + 6, 256 * c1 + c5);
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; CHECK-NEXT: Stmt_Copy_0(96 * c2 + 4 * c4, 8 * c3 + 7, 256 * c1 + c5);
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; CHECK-NEXT: Stmt_Copy_0(96 * c2 + 4 * c4 + 1, 8 * c3, 256 * c1 + c5);
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; CHECK-NEXT: Stmt_Copy_0(96 * c2 + 4 * c4 + 1, 8 * c3 + 1, 256 * c1 + c5);
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; CHECK-NEXT: Stmt_Copy_0(96 * c2 + 4 * c4 + 1, 8 * c3 + 2, 256 * c1 + c5);
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; CHECK-NEXT: Stmt_Copy_0(96 * c2 + 4 * c4 + 1, 8 * c3 + 3, 256 * c1 + c5);
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; CHECK-NEXT: Stmt_Copy_0(96 * c2 + 4 * c4 + 1, 8 * c3 + 4, 256 * c1 + c5);
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; CHECK-NEXT: Stmt_Copy_0(96 * c2 + 4 * c4 + 1, 8 * c3 + 5, 256 * c1 + c5);
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; CHECK-NEXT: Stmt_Copy_0(96 * c2 + 4 * c4 + 1, 8 * c3 + 6, 256 * c1 + c5);
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; CHECK-NEXT: Stmt_Copy_0(96 * c2 + 4 * c4 + 1, 8 * c3 + 7, 256 * c1 + c5);
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; CHECK-NEXT: Stmt_Copy_0(96 * c2 + 4 * c4 + 2, 8 * c3, 256 * c1 + c5);
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; CHECK-NEXT: Stmt_Copy_0(96 * c2 + 4 * c4 + 2, 8 * c3 + 1, 256 * c1 + c5);
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; CHECK-NEXT: Stmt_Copy_0(96 * c2 + 4 * c4 + 2, 8 * c3 + 2, 256 * c1 + c5);
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; CHECK-NEXT: Stmt_Copy_0(96 * c2 + 4 * c4 + 2, 8 * c3 + 3, 256 * c1 + c5);
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; CHECK-NEXT: Stmt_Copy_0(96 * c2 + 4 * c4 + 2, 8 * c3 + 4, 256 * c1 + c5);
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; CHECK-NEXT: Stmt_Copy_0(96 * c2 + 4 * c4 + 2, 8 * c3 + 5, 256 * c1 + c5);
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; CHECK-NEXT: Stmt_Copy_0(96 * c2 + 4 * c4 + 2, 8 * c3 + 6, 256 * c1 + c5);
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; CHECK-NEXT: Stmt_Copy_0(96 * c2 + 4 * c4 + 2, 8 * c3 + 7, 256 * c1 + c5);
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; CHECK-NEXT: Stmt_Copy_0(96 * c2 + 4 * c4 + 3, 8 * c3, 256 * c1 + c5);
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; CHECK-NEXT: Stmt_Copy_0(96 * c2 + 4 * c4 + 3, 8 * c3 + 1, 256 * c1 + c5);
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; CHECK-NEXT: Stmt_Copy_0(96 * c2 + 4 * c4 + 3, 8 * c3 + 2, 256 * c1 + c5);
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; CHECK-NEXT: Stmt_Copy_0(96 * c2 + 4 * c4 + 3, 8 * c3 + 3, 256 * c1 + c5);
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; CHECK-NEXT: Stmt_Copy_0(96 * c2 + 4 * c4 + 3, 8 * c3 + 4, 256 * c1 + c5);
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; CHECK-NEXT: Stmt_Copy_0(96 * c2 + 4 * c4 + 3, 8 * c3 + 5, 256 * c1 + c5);
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; CHECK-NEXT: Stmt_Copy_0(96 * c2 + 4 * c4 + 3, 8 * c3 + 6, 256 * c1 + c5);
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; CHECK-NEXT: Stmt_Copy_0(96 * c2 + 4 * c4 + 3, 8 * c3 + 7, 256 * c1 + c5);
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; CHECK-NEXT: }
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; CHECK-NEXT: }
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; CHECK-NEXT: }
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; CHECK-NEXT: }
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; CHECK-NEXT: }
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;
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-unknown"
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define internal void @kernel_gemm(i32 %arg, i32 %arg1, i32 %arg2, double %arg3, double %arg4, [1056 x double]* %arg5, [1023 x double]* %arg6, [1056 x double]* %arg7) #0 {
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bb:
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br label %bb8
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bb8: ; preds = %bb29, %bb
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%tmp = phi i64 [ 0, %bb ], [ %tmp30, %bb29 ]
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br label %bb9
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bb9: ; preds = %bb26, %bb8
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%tmp10 = phi i64 [ 0, %bb8 ], [ %tmp27, %bb26 ]
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%tmp11 = getelementptr inbounds [1056 x double], [1056 x double]* %arg5, i64 %tmp, i64 %tmp10
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%tmp12 = load double, double* %tmp11, align 8
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%tmp13 = fmul double %tmp12, %arg4
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store double %tmp13, double* %tmp11, align 8
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br label %Copy_0
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Copy_0: ; preds = %Copy_0, %bb9
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%tmp15 = phi i64 [ 0, %bb9 ], [ %tmp24, %Copy_0 ]
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%tmp16 = getelementptr inbounds [1023 x double], [1023 x double]* %arg6, i64 %tmp, i64 %tmp15
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%tmp17 = load double, double* %tmp16, align 8
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%tmp18 = fmul double %tmp17, %arg3
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%tmp19 = getelementptr inbounds [1056 x double], [1056 x double]* %arg7, i64 %tmp15, i64 %tmp10
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%tmp20 = load double, double* %tmp19, align 8
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%tmp21 = fmul double %tmp18, %tmp20
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%tmp22 = load double, double* %tmp11, align 8
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%tmp23 = fadd double %tmp22, %tmp21
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store double %tmp23, double* %tmp11, align 8
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%tmp24 = add nuw nsw i64 %tmp15, 1
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%tmp25 = icmp ne i64 %tmp24, 1023
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br i1 %tmp25, label %Copy_0, label %bb26
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bb26: ; preds = %Copy_0
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%tmp27 = add nuw nsw i64 %tmp10, 1
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%tmp28 = icmp ne i64 %tmp27, 1056
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br i1 %tmp28, label %bb9, label %bb29
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bb29: ; preds = %bb26
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%tmp30 = add nuw nsw i64 %tmp, 1
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%tmp31 = icmp ne i64 %tmp30, 1056
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br i1 %tmp31, label %bb8, label %bb32
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bb32: ; preds = %bb29
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ret void
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}
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attributes #0 = { nounwind uwtable "target-cpu"="x86-64" "target-features"="+aes,+avx,+cmov,+cx16,+fxsr,+mmx,+pclmul,+popcnt,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsaveopt" }
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