Kazu Hirata 197c3a3efc Use llvm::less_first (NFC) (#94136)

2024-06-02 07:45:50 -07:00

..

AsmParser

MCExpr-ify amd_kernel_code_t (#91587)

2024-05-22 13:45:45 +01:00

Disassembler

Add clarifying parenthesis around non-trivial conditions in ternary expressions. (#90391)

2024-05-04 18:38:45 +01:00

MCA

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MCTargetDesc

AMDGPU: Add gfx12-generic target (#93875)

2024-05-31 12:46:44 -04:00

TargetInfo

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Utils

AMDGPU: Add gfx12-generic target (#93875)

2024-05-31 12:46:44 -04:00

AMDGPU.h

Revert "[NewPM][CodeGen] Port selection dag isel to new pass manager" (#94146)

2024-06-02 14:31:52 +08:00

AMDGPU.td

AMDGPU: Add gfx12-generic target (#93875)

2024-05-31 12:46:44 -04:00

AMDGPUAliasAnalysis.cpp

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AMDGPUAliasAnalysis.h

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AMDGPUAlwaysInlinePass.cpp

[AMDGPU] Always Inline preserved analyses (#91198)

2024-05-09 06:17:01 -04:00

AMDGPUAnnotateKernelFeatures.cpp

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AMDGPUAnnotateUniformValues.cpp

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AMDGPUArgumentUsageInfo.cpp

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AMDGPUArgumentUsageInfo.h

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AMDGPUAsmPrinter.cpp

MCExpr-ify amd_kernel_code_t (#91587)

2024-05-22 13:45:45 +01:00

AMDGPUAsmPrinter.h

MCExpr-ify amd_kernel_code_t (#91587)

2024-05-22 13:45:45 +01:00

AMDGPUAtomicOptimizer.cpp

[AMDGPU] Build lane intrinsics in a mangling-agnostic way. NFC. (#91583)

2024-05-09 13:42:40 +01:00

AMDGPUAttributes.def

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AMDGPUAttributor.cpp

[Target] Use StringRef::operator== instead of StringRef::equals (NFC) (#91072) (#91138)

2024-05-05 13:43:10 -07:00

AMDGPUCallingConv.td

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AMDGPUCallLowering.cpp

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AMDGPUCallLowering.h

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AMDGPUCodeGenPassBuilder.cpp

Revert "[NewPM][CodeGen] Port selection dag isel to new pass manager" (#94146)

2024-06-02 14:31:52 +08:00

AMDGPUCodeGenPassBuilder.h

[NewPM][AMDGPU] Add CodeGenPassBuilder (#91040)

2024-05-19 15:57:02 +08:00

AMDGPUCodeGenPrepare.cpp

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AMDGPUCombine.td

[AMDGPU] Fix typo in function name

2024-05-06 08:55:09 +01:00

AMDGPUCombinerHelper.cpp

AMDGPU/GlobalISel: Use correct type for intrinsic ID

2024-05-30 14:31:19 +02:00

AMDGPUCombinerHelper.h

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AMDGPUCtorDtorLowering.cpp

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AMDGPUCtorDtorLowering.h

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AMDGPUExportClustering.cpp

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AMDGPUExportClustering.h

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AMDGPUFeatures.td

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AMDGPUFrameLowering.cpp

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AMDGPUFrameLowering.h

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AMDGPUGenRegisterBankInfo.def

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AMDGPUGISel.td

[AMDGPU] Legalize and select raw/struct_buffer_load with tfe (#93310)

2024-05-27 14:09:17 +02:00

AMDGPUGlobalISelDivergenceLowering.cpp

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AMDGPUGlobalISelUtils.cpp

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AMDGPUGlobalISelUtils.h

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AMDGPUHSAMetadataStreamer.cpp

MCExpr-ify SIProgramInfo (#88257)

2024-05-09 13:02:32 +01:00

AMDGPUHSAMetadataStreamer.h

[AMDGPU] Fix unittest linking error with LLVM_LINK_LLVM_DYLIB (#91727)

2024-05-11 09:18:05 +02:00

AMDGPUIGroupLP.cpp

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AMDGPUIGroupLP.h

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AMDGPUImageIntrinsicOptimizer.cpp

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AMDGPUInsertDelayAlu.cpp

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AMDGPUInsertSingleUseVDST.cpp

Fix MSVC signed/unsigned mismatch warning. NFC.

2024-05-03 09:38:51 +01:00

AMDGPUInstCombineIntrinsic.cpp

Replace uses of ConstantExpr::getCompare. (#91558)

2024-05-09 16:50:01 -07:00

AMDGPUInstrInfo.cpp

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AMDGPUInstrInfo.h

AMDGPU/GlobalISel: Use correct type for intrinsic ID

2024-05-30 14:31:19 +02:00

AMDGPUInstrInfo.td

[AMDGPU] Add a trap lowering workaround for gfx11 (#85854)

2024-04-24 09:43:54 -04:00

AMDGPUInstructions.td

[AMDGPU] HasOneUse uses (#92534)

2024-05-21 11:25:39 -04:00

AMDGPUInstructionSelector.cpp

AMDGPU/GlobalISel: Use correct type for intrinsic ID

2024-05-30 14:31:19 +02:00

AMDGPUInstructionSelector.h

[AMDGPU] New intrinsic llvm.amdgcn.pops.exiting.wave.id (#89612)

2024-05-22 19:47:59 +01:00

AMDGPUISelDAGToDAG.cpp

Revert "[NewPM][CodeGen] Port selection dag isel to new pass manager" (#94146)

2024-06-02 14:31:52 +08:00

AMDGPUISelDAGToDAG.h

Revert "[NewPM][CodeGen] Port selection dag isel to new pass manager" (#94146)

2024-06-02 14:31:52 +08:00

AMDGPUISelLowering.cpp

[AMDGPU] Legalize and select raw/struct_buffer_load with tfe (#93310)

2024-05-27 14:09:17 +02:00

AMDGPUISelLowering.h

[AMDGPU] Legalize and select raw/struct_buffer_load with tfe (#93310)

2024-05-27 14:09:17 +02:00

AMDGPULateCodeGenPrepare.cpp

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AMDGPULegalizerInfo.cpp

[AMDGPU] Legalize and select raw/struct_buffer_load with tfe (#93310)

2024-05-27 14:09:17 +02:00

AMDGPULegalizerInfo.h

[AMDGPU] Use LSH for lowering ctlz_zero_undef.i8/i16 (#88512)

2024-05-19 21:45:24 +01:00

AMDGPULibCalls.cpp

AMDGPU: Emit 1/llvm.sqrt(x) instead of rsqrt calls in libcall handling (#92863)

2024-05-21 18:42:45 +02:00

AMDGPULibFunc.cpp

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AMDGPULibFunc.h

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AMDGPULowerBufferFatPointers.cpp

[IR] Add getelementptr nusw and nuw flags (#90824)

2024-05-27 16:05:17 +02:00

AMDGPULowerKernelArguments.cpp

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AMDGPULowerKernelAttributes.cpp

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AMDGPULowerModuleLDSPass.cpp

[AMDGPU] Use removeFnAttrFromReachable in lower-module-lds pass. (#92686)

2024-05-20 10:24:40 +05:30

AMDGPUMachineCFGStructurizer.cpp

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AMDGPUMachineFunction.cpp

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AMDGPUMachineFunction.h

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AMDGPUMachineModuleInfo.cpp

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AMDGPUMachineModuleInfo.h

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AMDGPUMacroFusion.cpp

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AMDGPUMacroFusion.h

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AMDGPUMarkLastScratchLoad.cpp

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AMDGPUMCInstLower.cpp

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AMDGPUMCInstLower.h

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AMDGPUMIRFormatter.cpp

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AMDGPUMIRFormatter.h

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AMDGPUOpenCLEnqueuedBlockLowering.cpp

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AMDGPUPassRegistry.def

Revert "[NewPM][CodeGen] Port selection dag isel to new pass manager" (#94146)

2024-06-02 14:31:52 +08:00

AMDGPUPerfHintAnalysis.cpp

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AMDGPUPerfHintAnalysis.h

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AMDGPUPostLegalizerCombiner.cpp

[AMDGPU] Fix typo in function name

2024-05-06 08:55:09 +01:00

AMDGPUPredicateControl.td

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AMDGPUPreLegalizerCombiner.cpp

[AMDGPU] Remove unneeded calls to setInstrAndDebugLoc in matchers. NFC.

2024-05-03 15:01:47 +01:00

AMDGPUPrintfRuntimeBinding.cpp

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AMDGPUPromoteAlloca.cpp

[AMDGPU][PromoteAlloca] Don't stop when an alloca is too big to promote (#93466)

2024-05-28 08:05:50 +02:00

AMDGPUPromoteKernelArguments.cpp

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AMDGPUPTNote.h

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AMDGPURegBankCombiner.cpp

[AMDGPU] Remove unneeded calls to setInstrAndDebugLoc in matchers. NFC.

2024-05-03 15:01:47 +01:00

AMDGPURegBankSelect.cpp

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AMDGPURegBankSelect.h

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AMDGPURegisterBankInfo.cpp

[AMDGPU] Legalize and select raw/struct_buffer_load with tfe (#93310)

2024-05-27 14:09:17 +02:00

AMDGPURegisterBankInfo.h

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AMDGPURegisterBanks.td

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AMDGPURemoveIncompatibleFunctions.cpp

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AMDGPUResourceUsageAnalysis.cpp

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AMDGPUResourceUsageAnalysis.h

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AMDGPURewriteOutArguments.cpp

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AMDGPURewriteUndefForPHI.cpp

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AMDGPUSearchableTables.td

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AMDGPUSetWavePriority.cpp

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AMDGPUSplitModule.cpp

[AMDGPU][SplitModule] Keep looking for more dependencies after finding an indirect call (#93480)

2024-05-28 08:18:53 +02:00

AMDGPUSplitModule.h

Reland "[AMDGPU] Add AMDGPU-specific module splitting (#89245)"

2024-05-27 10:43:00 +02:00

AMDGPUSubtarget.cpp

MCExpr-ify SIProgramInfo (#88257)

2024-05-09 13:02:32 +01:00

AMDGPUSubtarget.h

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AMDGPUTargetMachine.cpp

Revert "[NewPM][CodeGen] Port selection dag isel to new pass manager" (#94146)

2024-06-02 14:31:52 +08:00

AMDGPUTargetMachine.h

Reland "[AMDGPU] Add AMDGPU-specific module splitting (#89245)"

2024-05-27 10:43:00 +02:00

AMDGPUTargetObjectFile.cpp

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AMDGPUTargetObjectFile.h

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AMDGPUTargetTransformInfo.cpp

[AMDGPU] Vectorize more 16 bit shuffles (#90648)

2024-05-21 09:21:36 -07:00

AMDGPUTargetTransformInfo.h

[TTI] getArithmeticInstrCost - use std:nullopt to create default empty ArrayRef<const Value *> Args argument. NFC.

2024-04-24 10:51:18 +01:00

AMDGPUUnifyDivergentExitNodes.cpp

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AMDGPUUnifyDivergentExitNodes.h

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AMDGPUUnifyMetadata.cpp

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AMDKernelCodeT.h

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BUFInstructions.td

[AMDGPU] Copy Defs and Uses from Pseudo to Real Instructions (#93004)

2024-05-31 08:40:54 +02:00

CaymanInstructions.td

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CMakeLists.txt

Reland "[AMDGPU] Add AMDGPU-specific module splitting (#89245)"

2024-05-27 10:43:00 +02:00

DSDIRInstructions.td

AMDGPU: Use PseudoInstr to name SIMCInstr for DSDIR and SOPs, NFC (#87537)

2024-04-03 11:35:09 -07:00

DSInstructions.td

[AMDGPU] Copy Defs and Uses from Pseudo to Real Instructions (#93004)

2024-05-31 08:40:54 +02:00

EvergreenInstructions.td

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EXPInstructions.td

[AMDGPU] Remove unnecessary predicates from aliases. NFC. (#91602)

2024-05-10 15:04:38 +01:00

FLATInstructions.td

[AMDGPU] Copy Defs and Uses from Pseudo to Real Instructions (#93004)

2024-05-31 08:40:54 +02:00

GCNCreateVOPD.cpp

[AMDGPU] Fix implicit operands of VOPD cndmask instructions (#87788)

2024-04-16 10:14:15 +01:00

GCNDPPCombine.cpp

[AMDGPU] Support byte_sel modifier for v_cvt_f32_fp8 and v_cvt_f32_bf8 (#90887)

2024-05-02 12:03:51 -07:00

GCNHazardRecognizer.cpp

[AMDGPU] Remove some pointless fallthrough annotations

2024-05-01 16:04:35 +01:00

GCNHazardRecognizer.h

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GCNILPSched.cpp

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GCNIterativeScheduler.cpp

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GCNIterativeScheduler.h

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GCNMinRegStrategy.cpp

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GCNNSAReassign.cpp

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GCNPreRALongBranchReg.cpp

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GCNPreRAOptimizations.cpp

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GCNProcessors.td

AMDGPU: Add gfx12-generic target (#93875)

2024-05-31 12:46:44 -04:00

GCNRegPressure.cpp

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GCNRegPressure.h

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GCNRewritePartialRegUses.cpp

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GCNSchedStrategy.cpp

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GCNSchedStrategy.h

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GCNSubtarget.h

AMDGPU: Fix creating minimum3/maximum3 nodes pre-gfx12 (#93027)

2024-05-23 15:59:43 +02:00

GCNVOPDUtils.cpp

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GCNVOPDUtils.h

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InstCombineTables.td

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MIMGInstructions.td

[AMDGPU][MC] Support tfe operand in image_atomic instructions (#92469)

2024-05-29 15:55:58 -07:00

R600.h

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R600.td

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R600AsmPrinter.cpp

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R600AsmPrinter.h

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R600ClauseMergePass.cpp

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R600CodeGenPassBuilder.cpp

[NewPM][AMDGPU] Add CodeGenPassBuilder (#91040)

2024-05-19 15:57:02 +08:00

R600CodeGenPassBuilder.h

[NewPM][AMDGPU] Add CodeGenPassBuilder (#91040)

2024-05-19 15:57:02 +08:00

R600ControlFlowFinalizer.cpp

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R600Defines.h

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R600EmitClauseMarkers.cpp

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R600ExpandSpecialInstrs.cpp

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R600FrameLowering.cpp

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R600FrameLowering.h

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R600InstrFormats.td

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R600InstrInfo.cpp

[CodeGen] Make the parameter TRI required in some functions. (#85968)

2024-04-24 14:24:14 +01:00

R600InstrInfo.h

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R600InstrInfo.td

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R600Instructions.td

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R600ISelDAGToDAG.cpp

Revert "[NewPM][CodeGen] Port selection dag isel to new pass manager" (#94146)

2024-06-02 14:31:52 +08:00

R600ISelLowering.cpp

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R600ISelLowering.h

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R600MachineCFGStructurizer.cpp

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R600MachineFunctionInfo.cpp

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R600MachineFunctionInfo.h

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R600MachineScheduler.cpp

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R600MachineScheduler.h

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R600MCInstLower.cpp

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R600OpenCLImageTypeLoweringPass.cpp

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R600OptimizeVectorRegisters.cpp

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R600Packetizer.cpp

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R600Processors.td

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R600RegisterInfo.cpp

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R600RegisterInfo.h

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R600RegisterInfo.td

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R600Schedule.td

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R600Subtarget.cpp

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R600Subtarget.h

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R600TargetMachine.cpp

[NewPM][AMDGPU] Add CodeGenPassBuilder (#91040)

2024-05-19 15:57:02 +08:00

R600TargetMachine.h

[NewPM][AMDGPU] Add CodeGenPassBuilder (#91040)

2024-05-19 15:57:02 +08:00

R600TargetTransformInfo.cpp

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R600TargetTransformInfo.h

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R700Instructions.td

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SIAnnotateControlFlow.cpp

[AMDGPU] Fix incorrect stepping in gdb for amdgcn.end.cf intrinsic. (#83010)

2024-05-02 12:59:31 +02:00

SIDefines.h

MCExpr-ify amd_kernel_code_t (#91587)

2024-05-22 13:45:45 +01:00

SIFixSGPRCopies.cpp

[CodeGen] Make the parameter TRI required in some functions. (#85968)

2024-04-24 14:24:14 +01:00

SIFixVGPRCopies.cpp

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SIFoldOperands.cpp

[AMDGPU] Don't optimize agpr phis if the operand doesn't have subreg use (#91267)

2024-05-07 16:44:00 -04:00

SIFormMemoryClauses.cpp

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SIFrameLowering.cpp

[AMDGPU] Reserved private memory register during PEI (#93536)

2024-05-29 15:10:44 +05:30

SIFrameLowering.h

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SIInsertHardClauses.cpp

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SIInsertWaitcnts.cpp

[AMDGPU] Remove #if 0 code for indexed resources in SIInsertWaitcnts (#92905)

2024-05-21 13:51:42 +01:00

SIInstrFormats.td

[AMDGPU][NFC] Eliminate GCNPredicateControl. (#93964)

2024-05-31 16:28:43 +01:00

SIInstrInfo.cpp

AMDGPU: Remove arbitrary SCC liveness scan threshold (#94097)

2024-06-01 14:19:38 +02:00

SIInstrInfo.h

[AMDGPU] Enhance s_waitcnt insertion before barrier for gfx12 (#90595)

2024-05-01 11:37:13 +01:00

SIInstrInfo.td

[AMDGPU][NFC] Eliminate GCNPredicateControl. (#93964)

2024-05-31 16:28:43 +01:00

SIInstructions.td

[AMDGPU][NFC] Eliminate GCNPredicateControl. (#93964)

2024-05-31 16:28:43 +01:00

SIISelLowering.cpp

Revert "[NewPM][CodeGen] Port selection dag isel to new pass manager" (#94146)

2024-06-02 14:31:52 +08:00

SIISelLowering.h

[AMDGPU] Enable constant offset promotion to immediate FLAT (#93884)

2024-05-31 12:23:27 -07:00

SILateBranchLowering.cpp

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SILoadStoreOptimizer.cpp

[AMDGPU] Enable constant offset promotion to immediate FLAT (#93884)

2024-05-31 12:23:27 -07:00

SILowerControlFlow.cpp

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SILowerI1Copies.cpp

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SILowerI1Copies.h

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SILowerSGPRSpills.cpp

[AMDGPU] Fix end() iterator dereference in SILowerSGPRSpills (#88828)

2024-04-18 09:34:27 -05:00

SILowerWWMCopies.cpp

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SIMachineFunctionInfo.cpp

[AMDGPU] Fix typo in #89773

2024-04-29 11:57:06 +01:00

SIMachineFunctionInfo.h

Use llvm::less_first (NFC) (#94136)

2024-06-02 07:45:50 -07:00

SIMachineScheduler.cpp

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SIMachineScheduler.h

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SIMemoryLegalizer.cpp

[AMDGPU] Add amdgpu-as MMRA for fences (#78572)

2024-05-27 12:17:04 +02:00

SIModeRegister.cpp

[AMDGPU] Fix mode register pass for constrained FP operations (#90085)

2024-05-03 19:47:15 +02:00

SIModeRegisterDefaults.cpp

Reapply "AMDGPU: Implement llvm.set.rounding (#88587)" series (#91113)

2024-05-06 09:09:19 +02:00

SIModeRegisterDefaults.h

Reapply "AMDGPU: Implement llvm.set.rounding (#88587)" series (#91113)

2024-05-06 09:09:19 +02:00

SIOptimizeExecMasking.cpp

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SIOptimizeExecMaskingPreRA.cpp

[CodeGen] Make the parameter TRI required in some functions. (#85968)

2024-04-24 14:24:14 +01:00

SIOptimizeVGPRLiveRange.cpp

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SIPeepholeSDWA.cpp

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SIPostRABundler.cpp

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SIPreAllocateWWMRegs.cpp

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SIPreEmitPeephole.cpp

[CodeGen] Make the parameter TRI required in some functions. (#85968)

2024-04-24 14:24:14 +01:00

SIProgramInfo.cpp

MCExpr-ify SIProgramInfo (#88257)

2024-05-09 13:02:32 +01:00

SIProgramInfo.h

[AMDGPU] Fix unittest linking error with LLVM_LINK_LLVM_DYLIB (#91727)

2024-05-11 09:18:05 +02:00

SIRegisterInfo.cpp

[AMDGPU] Reserved private memory register during PEI (#93536)

2024-05-29 15:10:44 +05:30

SIRegisterInfo.h

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SIRegisterInfo.td

[AMDGPU] Extend llvm.amdgcn.update.dpp intrinsic to support f64 (#91190)

2024-05-13 10:20:37 +05:30

SISchedule.td

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SIShrinkInstructions.cpp

[CodeGen] Make the parameter TRI required in some functions. (#85968)

2024-04-24 14:24:14 +01:00

SIWholeQuadMode.cpp

[AMDGPU] Reduce use of continue in SIWholeQuadMode. NFC. (#93659)

2024-05-29 14:40:08 +01:00

SMInstructions.td

[AMDGPU] Copy Defs and Uses from Pseudo to Real Instructions (#93004)

2024-05-31 08:40:54 +02:00

SOPInstructions.td

[AMDGPU] Copy Defs and Uses from Pseudo to Real Instructions (#93004)

2024-05-31 08:40:54 +02:00

VIInstrFormats.td

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VINTERPInstructions.td

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VOP1Instructions.td

[AMDGPU] Refactor int_amdgcn_mov_dpp8 patterns. NFC. (#92764)

2024-05-20 18:58:17 +01:00

VOP2Instructions.td

[AMDGPU] Create AMDGPUMnemonicAlias tablegen class (#89288)

2024-05-09 11:37:56 -04:00

VOP3Instructions.td

[AMDGPU] Support byte_sel modifier on v_cvt_sr_fp8_f32 and v_cvt_sr_bf8_f32 (#90244)

2024-04-26 13:02:57 -07:00

VOP3PInstructions.td

[AMDGPU] Create AMDGPUMnemonicAlias tablegen class (#89288)

2024-05-09 11:37:56 -04:00

VOPCInstructions.td

[AMDGPU] Create AMDGPUMnemonicAlias tablegen class (#89288)

2024-05-09 11:37:56 -04:00

VOPDInstructions.td

…

VOPInstructions.td

[AMDGPU] Copy Defs and Uses from Pseudo to Real Instructions (#93004)

2024-05-31 08:40:54 +02:00