8331aaee8f
This patch adds support for some new relocation models to the ARM backend: * Read-only position independence (ROPI): Code and read-only data is accessed PC-relative. The offsets between all code and RO data sections are known at static link time. This does not affect read-write data. * Read-write position independence (RWPI): Read-write data is accessed relative to the static base register (r9). The offsets between all writeable data sections are known at static link time. This does not affect read-only data. These two modes are independent (they specify how different objects should be addressed), so they can be used individually or together. They are otherwise the same as the "static" relocation model, and are not compatible with SysV-style PIC using a global offset table. These modes are normally used by bare-metal systems or systems with small real-time operating systems. They are designed to avoid the need for a dynamic linker, the only initialisation required is setting r9 to an appropriate value for RWPI code. I have only added support to SelectionDAG, not FastISel, because FastISel is currently disabled for bare-metal targets where these modes would be used. Differential Revision: https://reviews.llvm.org/D23195 llvm-svn: 278015
284 lines
8.5 KiB
C++
284 lines
8.5 KiB
C++
//===-- ARMELFObjectWriter.cpp - ARM ELF Writer ---------------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "MCTargetDesc/ARMMCTargetDesc.h"
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#include "MCTargetDesc/ARMFixupKinds.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/ADT/StringSwitch.h"
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#include "llvm/MC/MCELFObjectWriter.h"
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#include "llvm/MC/MCExpr.h"
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#include "llvm/MC/MCSectionELF.h"
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#include "llvm/MC/MCValue.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/raw_ostream.h"
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using namespace llvm;
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namespace {
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class ARMELFObjectWriter : public MCELFObjectTargetWriter {
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enum { DefaultEABIVersion = 0x05000000U };
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unsigned GetRelocTypeInner(const MCValue &Target,
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const MCFixup &Fixup,
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bool IsPCRel) const;
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public:
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ARMELFObjectWriter(uint8_t OSABI);
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~ARMELFObjectWriter() override;
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unsigned getRelocType(MCContext &Ctx, const MCValue &Target,
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const MCFixup &Fixup, bool IsPCRel) const override;
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bool needsRelocateWithSymbol(const MCSymbol &Sym,
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unsigned Type) const override;
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};
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}
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ARMELFObjectWriter::ARMELFObjectWriter(uint8_t OSABI)
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: MCELFObjectTargetWriter(/*Is64Bit*/ false, OSABI,
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ELF::EM_ARM,
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/*HasRelocationAddend*/ false) {}
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ARMELFObjectWriter::~ARMELFObjectWriter() {}
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bool ARMELFObjectWriter::needsRelocateWithSymbol(const MCSymbol &Sym,
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unsigned Type) const {
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// FIXME: This is extremely conservative. This really needs to use a
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// whitelist with a clear explanation for why each realocation needs to
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// point to the symbol, not to the section.
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switch (Type) {
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default:
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return true;
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case ELF::R_ARM_PREL31:
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case ELF::R_ARM_ABS32:
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return false;
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}
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}
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// Need to examine the Fixup when determining whether to
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// emit the relocation as an explicit symbol or as a section relative
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// offset
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unsigned ARMELFObjectWriter::getRelocType(MCContext &Ctx, const MCValue &Target,
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const MCFixup &Fixup,
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bool IsPCRel) const {
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return GetRelocTypeInner(Target, Fixup, IsPCRel);
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}
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unsigned ARMELFObjectWriter::GetRelocTypeInner(const MCValue &Target,
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const MCFixup &Fixup,
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bool IsPCRel) const {
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MCSymbolRefExpr::VariantKind Modifier = Target.getAccessVariant();
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unsigned Type = 0;
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if (IsPCRel) {
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switch ((unsigned)Fixup.getKind()) {
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default:
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report_fatal_error("unsupported relocation on symbol");
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return ELF::R_ARM_NONE;
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case FK_Data_4:
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switch (Modifier) {
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default: llvm_unreachable("Unsupported Modifier");
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case MCSymbolRefExpr::VK_None:
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Type = ELF::R_ARM_REL32;
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break;
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case MCSymbolRefExpr::VK_TLSGD:
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llvm_unreachable("unimplemented");
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case MCSymbolRefExpr::VK_GOTTPOFF:
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Type = ELF::R_ARM_TLS_IE32;
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break;
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case MCSymbolRefExpr::VK_ARM_GOT_PREL:
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Type = ELF::R_ARM_GOT_PREL;
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break;
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case MCSymbolRefExpr::VK_ARM_PREL31:
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Type = ELF::R_ARM_PREL31;
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break;
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}
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break;
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case ARM::fixup_arm_blx:
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case ARM::fixup_arm_uncondbl:
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switch (Modifier) {
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case MCSymbolRefExpr::VK_PLT:
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Type = ELF::R_ARM_CALL;
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break;
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case MCSymbolRefExpr::VK_TLSCALL:
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Type = ELF::R_ARM_TLS_CALL;
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break;
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default:
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Type = ELF::R_ARM_CALL;
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break;
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}
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break;
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case ARM::fixup_arm_condbl:
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case ARM::fixup_arm_condbranch:
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case ARM::fixup_arm_uncondbranch:
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Type = ELF::R_ARM_JUMP24;
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break;
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case ARM::fixup_t2_condbranch:
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Type = ELF::R_ARM_THM_JUMP19;
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break;
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case ARM::fixup_t2_uncondbranch:
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Type = ELF::R_ARM_THM_JUMP24;
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break;
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case ARM::fixup_arm_movt_hi16:
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Type = ELF::R_ARM_MOVT_PREL;
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break;
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case ARM::fixup_arm_movw_lo16:
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Type = ELF::R_ARM_MOVW_PREL_NC;
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break;
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case ARM::fixup_t2_movt_hi16:
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Type = ELF::R_ARM_THM_MOVT_PREL;
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break;
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case ARM::fixup_t2_movw_lo16:
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Type = ELF::R_ARM_THM_MOVW_PREL_NC;
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break;
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case ARM::fixup_arm_thumb_bl:
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case ARM::fixup_arm_thumb_blx:
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switch (Modifier) {
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case MCSymbolRefExpr::VK_TLSCALL:
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Type = ELF::R_ARM_THM_TLS_CALL;
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break;
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default:
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Type = ELF::R_ARM_THM_CALL;
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break;
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}
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break;
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}
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} else {
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switch ((unsigned)Fixup.getKind()) {
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default:
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report_fatal_error("unsupported relocation on symbol");
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return ELF::R_ARM_NONE;
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case FK_Data_1:
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switch (Modifier) {
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default: llvm_unreachable("unsupported Modifier");
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case MCSymbolRefExpr::VK_None:
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Type = ELF::R_ARM_ABS8;
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break;
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}
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break;
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case FK_Data_2:
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switch (Modifier) {
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default: llvm_unreachable("unsupported modifier");
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case MCSymbolRefExpr::VK_None:
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Type = ELF::R_ARM_ABS16;
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break;
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}
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break;
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case FK_Data_4:
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switch (Modifier) {
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default: llvm_unreachable("Unsupported Modifier");
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case MCSymbolRefExpr::VK_ARM_NONE:
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Type = ELF::R_ARM_NONE;
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break;
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case MCSymbolRefExpr::VK_GOT:
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Type = ELF::R_ARM_GOT_BREL;
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break;
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case MCSymbolRefExpr::VK_TLSGD:
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Type = ELF::R_ARM_TLS_GD32;
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break;
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case MCSymbolRefExpr::VK_TPOFF:
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Type = ELF::R_ARM_TLS_LE32;
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break;
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case MCSymbolRefExpr::VK_GOTTPOFF:
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Type = ELF::R_ARM_TLS_IE32;
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break;
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case MCSymbolRefExpr::VK_None:
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Type = ELF::R_ARM_ABS32;
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break;
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case MCSymbolRefExpr::VK_GOTOFF:
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Type = ELF::R_ARM_GOTOFF32;
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break;
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case MCSymbolRefExpr::VK_ARM_GOT_PREL:
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Type = ELF::R_ARM_GOT_PREL;
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break;
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case MCSymbolRefExpr::VK_ARM_TARGET1:
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Type = ELF::R_ARM_TARGET1;
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break;
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case MCSymbolRefExpr::VK_ARM_TARGET2:
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Type = ELF::R_ARM_TARGET2;
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break;
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case MCSymbolRefExpr::VK_ARM_PREL31:
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Type = ELF::R_ARM_PREL31;
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break;
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case MCSymbolRefExpr::VK_ARM_SBREL:
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Type = ELF::R_ARM_SBREL32;
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break;
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case MCSymbolRefExpr::VK_ARM_TLSLDO:
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Type = ELF::R_ARM_TLS_LDO32;
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break;
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case MCSymbolRefExpr::VK_TLSCALL:
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Type = ELF::R_ARM_TLS_CALL;
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break;
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case MCSymbolRefExpr::VK_TLSDESC:
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Type = ELF::R_ARM_TLS_GOTDESC;
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break;
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case MCSymbolRefExpr::VK_TLSLDM:
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Type = ELF::R_ARM_TLS_LDM32;
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break;
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case MCSymbolRefExpr::VK_ARM_TLSDESCSEQ:
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Type = ELF::R_ARM_TLS_DESCSEQ;
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break;
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}
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break;
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case ARM::fixup_arm_ldst_pcrel_12:
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case ARM::fixup_arm_pcrel_10:
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case ARM::fixup_arm_adr_pcrel_12:
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case ARM::fixup_arm_thumb_bl:
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case ARM::fixup_arm_thumb_cb:
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case ARM::fixup_arm_thumb_cp:
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case ARM::fixup_arm_thumb_br:
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llvm_unreachable("Unimplemented");
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case ARM::fixup_arm_condbranch:
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case ARM::fixup_arm_uncondbranch:
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Type = ELF::R_ARM_JUMP24;
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break;
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case ARM::fixup_arm_movt_hi16:
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switch (Modifier) {
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default: llvm_unreachable("Unsupported Modifier");
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case MCSymbolRefExpr::VK_None:
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Type = ELF::R_ARM_MOVT_ABS;
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break;
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case MCSymbolRefExpr::VK_ARM_SBREL:
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Type = ELF:: R_ARM_MOVT_BREL;
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break;
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}
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break;
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case ARM::fixup_arm_movw_lo16:
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switch (Modifier) {
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default: llvm_unreachable("Unsupported Modifier");
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case MCSymbolRefExpr::VK_None:
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Type = ELF::R_ARM_MOVW_ABS_NC;
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break;
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case MCSymbolRefExpr::VK_ARM_SBREL:
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Type = ELF:: R_ARM_MOVW_BREL_NC;
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break;
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}
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break;
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case ARM::fixup_t2_movt_hi16:
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Type = ELF::R_ARM_THM_MOVT_ABS;
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break;
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case ARM::fixup_t2_movw_lo16:
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Type = ELF::R_ARM_THM_MOVW_ABS_NC;
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break;
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}
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}
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return Type;
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}
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MCObjectWriter *llvm::createARMELFObjectWriter(raw_pwrite_stream &OS,
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uint8_t OSABI,
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bool IsLittleEndian) {
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MCELFObjectTargetWriter *MOTW = new ARMELFObjectWriter(OSABI);
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return createELFObjectWriter(MOTW, OS, IsLittleEndian);
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}
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